/external/XNNPACK/test/ |
D | f32-gemm.cc | 340 TEST(F32_GEMM_4X4__AARCH32_VFP_LD64, n_div_4_strided_cn) { in TEST() argument 2259 TEST(F32_GEMM_1X4__WASM, n_div_4_strided_cn) { in TEST() argument 2566 TEST(F32_GEMM_2X4__WASM, n_div_4_strided_cn) { in TEST() argument 2873 TEST(F32_GEMM_4X4__WASM, n_div_4_strided_cn) { in TEST() argument 3486 TEST(F32_GEMM_1X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3791 TEST(F32_GEMM_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 4096 TEST(F32_GEMM_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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D | f32-gemm-relu.cc | 1856 TEST(F32_GEMM_RELU_1X4__WASM, n_div_4_strided_cn) { in TEST() argument 2163 TEST(F32_GEMM_RELU_2X4__WASM, n_div_4_strided_cn) { in TEST() argument 2470 TEST(F32_GEMM_RELU_4X4__WASM, n_div_4_strided_cn) { in TEST() argument 3083 TEST(F32_GEMM_RELU_1X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3388 TEST(F32_GEMM_RELU_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3693 TEST(F32_GEMM_RELU_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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D | f32-igemm-relu.cc | 1859 TEST(F32_IGEMM_RELU_1X4__WASM, n_div_4_strided_cn) { in TEST() argument 2208 TEST(F32_IGEMM_RELU_2X4__WASM, n_div_4_strided_cn) { in TEST() argument 2557 TEST(F32_IGEMM_RELU_4X4__WASM, n_div_4_strided_cn) { in TEST() argument 3254 TEST(F32_IGEMM_RELU_1X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3601 TEST(F32_IGEMM_RELU_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3948 TEST(F32_IGEMM_RELU_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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D | f32-igemm.cc | 1859 TEST(F32_IGEMM_1X4__WASM, n_div_4_strided_cn) { in TEST() argument 2208 TEST(F32_IGEMM_2X4__WASM, n_div_4_strided_cn) { in TEST() argument 2557 TEST(F32_IGEMM_4X4__WASM, n_div_4_strided_cn) { in TEST() argument 3254 TEST(F32_IGEMM_1X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3601 TEST(F32_IGEMM_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3948 TEST(F32_IGEMM_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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D | qs8-gemm-minmax.cc | 33192 TEST(QS8_GEMM_MINMAX_1X4C2__SSE2_LD64, n_div_4_strided_cn) { in TEST() argument 33648 TEST(QS8_GEMM_MINMAX_4X4C2__SSE2_LD64, n_div_4_strided_cn) { in TEST() argument 34104 TEST(QS8_GEMM_MINMAX_1X4C2__SSSE3_LD64, n_div_4_strided_cn) { in TEST() argument 34560 TEST(QS8_GEMM_MINMAX_4X4C2__SSSE3_LD64, n_div_4_strided_cn) { in TEST() argument 35016 TEST(QS8_GEMM_MINMAX_1X4C2__SSE41_LD64, n_div_4_strided_cn) { in TEST() argument 35472 TEST(QS8_GEMM_MINMAX_4X4C2__SSE41_LD64, n_div_4_strided_cn) { in TEST() argument 35928 TEST(QS8_GEMM_MINMAX_1X4C2__XOP_LD64, n_div_4_strided_cn) { in TEST() argument 36384 TEST(QS8_GEMM_MINMAX_4X4C2__XOP_LD64, n_div_4_strided_cn) { in TEST() argument 36840 TEST(QS8_GEMM_MINMAX_1X4C2__SSE2_LD128, n_div_4_strided_cn) { in TEST() argument 37296 TEST(QS8_GEMM_MINMAX_4X4C2__SSE2_LD128, n_div_4_strided_cn) { in TEST() argument [all …]
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D | qs8-igemm-minmax.cc | 32104 TEST(QS8_IGEMM_MINMAX_1X4C2__SSE2_LD64, n_div_4_strided_cn) { in TEST() argument 32572 TEST(QS8_IGEMM_MINMAX_4X4C2__SSE2_LD64, n_div_4_strided_cn) { in TEST() argument 33040 TEST(QS8_IGEMM_MINMAX_1X4C2__SSSE3_LD64, n_div_4_strided_cn) { in TEST() argument 33508 TEST(QS8_IGEMM_MINMAX_4X4C2__SSSE3_LD64, n_div_4_strided_cn) { in TEST() argument 33976 TEST(QS8_IGEMM_MINMAX_1X4C2__SSE41_LD64, n_div_4_strided_cn) { in TEST() argument 34444 TEST(QS8_IGEMM_MINMAX_4X4C2__SSE41_LD64, n_div_4_strided_cn) { in TEST() argument 34912 TEST(QS8_IGEMM_MINMAX_1X4C2__XOP_LD64, n_div_4_strided_cn) { in TEST() argument 35380 TEST(QS8_IGEMM_MINMAX_4X4C2__XOP_LD64, n_div_4_strided_cn) { in TEST() argument 35848 TEST(QS8_IGEMM_MINMAX_1X4C2__SSE2_LD128, n_div_4_strided_cn) { in TEST() argument 36316 TEST(QS8_IGEMM_MINMAX_4X4C2__SSE2_LD128, n_div_4_strided_cn) { in TEST() argument [all …]
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D | qu8-gemm-minmax.cc | 1370 TEST(QU8_GEMM_MINMAX_2X4C8__SSE2, n_div_4_strided_cn) { in TEST() argument 1875 TEST(QU8_GEMM_MINMAX_4X4C2__SSE2, n_div_4_strided_cn) { in TEST() argument
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D | f32-ppmm-minmax.cc | 2870 TEST(F32_PPMM_MINMAX_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 3186 TEST(F32_PPMM_MINMAX_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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D | qu8-igemm-minmax.cc | 1314 TEST(QU8_IGEMM_MINMAX_4X4C2__SSE2, n_div_4_strided_cn) { in TEST() argument
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D | f32-igemm-minmax.cc | 12132 TEST(F32_IGEMM_MINMAX_4X4__NEON_LANE_LD64, n_div_4_strided_cn) { in TEST() argument 15408 TEST(F32_IGEMM_MINMAX_4X4__NEONFMA_LANE_LD64, n_div_4_strided_cn) { in TEST() argument 59041 TEST(F32_IGEMM_MINMAX_1X4__WASM, n_div_4_strided_cn) { in TEST() argument 59416 TEST(F32_IGEMM_MINMAX_2X4__WASM, n_div_4_strided_cn) { in TEST() argument 59791 TEST(F32_IGEMM_MINMAX_4X4__WASM, n_div_4_strided_cn) { in TEST() argument 60540 TEST(F32_IGEMM_MINMAX_1X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 60913 TEST(F32_IGEMM_MINMAX_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 61286 TEST(F32_IGEMM_MINMAX_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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D | f32-gemm-minmax.cc | 12184 TEST(F32_GEMM_MINMAX_4X4__AARCH32_VFP_LD64, n_div_4_strided_cn) { in TEST() argument 58807 TEST(F32_GEMM_MINMAX_1X4__WASM, n_div_4_strided_cn) { in TEST() argument 59140 TEST(F32_GEMM_MINMAX_2X4__WASM, n_div_4_strided_cn) { in TEST() argument 59473 TEST(F32_GEMM_MINMAX_4X4__WASM, n_div_4_strided_cn) { in TEST() argument 60138 TEST(F32_GEMM_MINMAX_1X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 60469 TEST(F32_GEMM_MINMAX_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 60800 TEST(F32_GEMM_MINMAX_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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D | f32-gemminc-minmax.cc | 53146 TEST(F32_GEMMINC_MINMAX_1X4__WASM, n_div_4_strided_cn) { in TEST() argument 53479 TEST(F32_GEMMINC_MINMAX_2X4__WASM, n_div_4_strided_cn) { in TEST() argument 53812 TEST(F32_GEMMINC_MINMAX_4X4__WASM, n_div_4_strided_cn) { in TEST() argument 54144 TEST(F32_GEMMINC_MINMAX_1X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 54475 TEST(F32_GEMMINC_MINMAX_2X4__SCALAR, n_div_4_strided_cn) { in TEST() argument 54806 TEST(F32_GEMMINC_MINMAX_4X4__SCALAR, n_div_4_strided_cn) { in TEST() argument
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