Searched refs:n_subslices (Results 1 – 2 of 2) sorted by relevance
| /external/igt-gpu-tools/tests/i915/ |
| D | i915_query.c | 428 int n_slices = 0, n_subslices = 0; in test_query_topology_known_pci_ids() local
449 n_subslices++; in test_query_topology_known_pci_ids()
454 dev_info->codename, dev_info->gt, n_slices, n_subslices); in test_query_topology_known_pci_ids()
459 igt_assert(n_subslices == 1 || n_subslices == 2 || n_subslices == 3); in test_query_topology_known_pci_ids()
464 igt_assert_eq(n_subslices, 2); in test_query_topology_known_pci_ids()
466 igt_assert_eq(n_subslices, 3); in test_query_topology_known_pci_ids()
471 igt_assert_eq(n_subslices, 2 * 2); in test_query_topology_known_pci_ids()
473 igt_assert_eq(n_subslices, 2 * 3); in test_query_topology_known_pci_ids()
477 igt_assert_eq(n_subslices, 3 * 3); in test_query_topology_known_pci_ids()
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| /external/mesa3d/src/intel/dev/ |
| D | gen_device_info.c | 1071 uint32_t n_subslices = 0; in update_from_topology() local
1080 n_subslices += devinfo->num_subslices[s]; in update_from_topology()
1082 assert(n_subslices > 0); in update_from_topology()
1102 if (n_subslices >= 6) { in update_from_topology()
1103 assert(n_subslices == 6); in update_from_topology()
1105 } else if (n_subslices > 2) { in update_from_topology()
1121 devinfo->num_eu_per_subslice = DIV_ROUND_UP(n_eus, n_subslices); in update_from_topology()
1144 uint32_t n_subslices = __builtin_popcount(slice_mask) * in update_from_masks() local
1146 uint32_t num_eu_per_subslice = DIV_ROUND_UP(n_eus, n_subslices); in update_from_masks()
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