Searched refs:next_insn (Results 1 – 2 of 2) sorted by relevance
| /external/igt-gpu-tools/assembler/ |
| D | brw_eu_emit.c | 749 #define next_insn brw_next_insn macro
786 struct brw_instruction *insn = next_insn(p, opcode); in brw_alu1()
798 struct brw_instruction *insn = next_insn(p, opcode); in brw_alu2()
911 struct brw_instruction *insn = next_insn(p, opcode); in brw_alu3()
963 rnd = next_insn(p, BRW_OPCODE_##OP); \
1087 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP); in brw_NOP()
1178 insn = next_insn(p, BRW_OPCODE_IF); in brw_IF()
1222 insn = next_insn(p, BRW_OPCODE_IF); in gen6_IF()
1381 insn = next_insn(p, BRW_OPCODE_ELSE); in brw_ELSE()
1439 insn = next_insn(p, BRW_OPCODE_ENDIF); in brw_ENDIF()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_eu_emit.c | 693 #define next_insn brw_next_insn macro
713 brw_inst *insn = next_insn(p, opcode); in brw_alu1()
727 brw_inst *insn = next_insn(p, opcode); in brw_alu2()
790 brw_inst *inst = next_insn(p, opcode); in brw_alu3()
1311 brw_inst *insn = next_insn(p, BRW_OPCODE_NOP); in brw_NOP()
1318 brw_inst *insn = next_insn(p, BRW_OPCODE_SYNC); in brw_SYNC()
1403 insn = next_insn(p, BRW_OPCODE_IF); in brw_IF()
1452 insn = next_insn(p, BRW_OPCODE_IF); in gen6_IF()
1606 insn = next_insn(p, BRW_OPCODE_ELSE); in brw_ELSE()
1670 insn = next_insn(p, BRW_OPCODE_ENDIF); in brw_ENDIF()
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