/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
D | A55-basic-instructions.s | 221 ngcs w9, w10 label 225 ngcs x9, x10 label 233 ngcs w3, w12 label 234 ngcs wzr, w9 label 235 ngcs w23, wzr label 236 ngcs x29, x30 label 237 ngcs xzr, x0 label 238 ngcs x0, xzr label 1583 # CHECK-NEXT: 1 3 0.50 ngcs w9, w10 1587 # CHECK-NEXT: 1 3 0.50 ngcs x9, x10 [all …]
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | basic-a64-diagnostics.s | 728 ngcs wsp, w3 729 ngcs w9, wsp 730 ngcs sp, x9 731 ngcs x2, sp
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D | basic-a64-instructions.s | 938 ngcs w3, w12 939 ngcs wzr, w9 940 ngcs w23, wzr 945 ngcs x29, x30 946 ngcs xzr, x0 947 ngcs x0, xzr
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/external/llvm/test/MC/AArch64/ |
D | basic-a64-diagnostics.s | 714 ngcs wsp, w3 715 ngcs w9, wsp 716 ngcs sp, x9 717 ngcs x2, sp
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D | basic-a64-instructions.s | 938 ngcs w3, w12 939 ngcs wzr, w9 940 ngcs w23, wzr 945 ngcs x29, x30 946 ngcs xzr, x0 947 ngcs x0, xzr
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 370 0xe9,0x03,0x0a,0x7a = ngcs w9, w10 374 0xe9,0x03,0x0a,0xfa = ngcs x9, x10 382 0xe3,0x03,0x0c,0x7a = ngcs w3, w12 383 0xff,0x03,0x09,0x7a = ngcs wzr, w9 384 0xf7,0x03,0x1f,0x7a = ngcs w23, wzr 385 0xfd,0x03,0x1e,0xfa = ngcs x29, x30 386 0xff,0x03,0x00,0xfa = ngcs xzr, x0 387 0xe0,0x03,0x1f,0xfa = ngcs x0, xzr
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 558 # CHECK: ngcs w9, w10 567 # CHECK: ngcs x9, x10 588 # CHECK: ngcs w3, w12 589 # CHECK: ngcs wzr, w9 590 # CHECK: ngcs w23, wzr 595 # CHECK: ngcs x29, x30 596 # CHECK: ngcs xzr, x0 597 # CHECK: ngcs x0, xzr
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/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 560 # CHECK: ngcs w9, w10 569 # CHECK: ngcs x9, x10 590 # CHECK: ngcs w3, w12 591 # CHECK: ngcs wzr, w9 592 # CHECK: ngcs w23, wzr 597 # CHECK: ngcs x29, x30 598 # CHECK: ngcs xzr, x0 599 # CHECK: ngcs x0, xzr
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 389 COMPARE(ngcs(w28, Operand(w29)), "ngcs w28, w29"); in TEST() 390 COMPARE(ngcs(x30, Operand(x0)), "ngcs x30, x0"); in TEST()
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D | test-trace-aarch64.cc | 263 __ ngcs(w24, w25); in GenerateTestSequenceBase() local 264 __ ngcs(x26, x27); in GenerateTestSequenceBase() local
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D | test-cpu-features-aarch64.cc | 391 TEST_NONE(ngcs_0, ngcs(w0, w1)) 392 TEST_NONE(ngcs_1, ngcs(x0, x1))
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25 208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
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D | log-disasm | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25 208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
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D | log-cpufeatures-custom | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25 208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
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D | log-cpufeatures-colour | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25 208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
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D | log-cpufeatures | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25 208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
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D | log-all | 790 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25 793 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 692 void ngcs(const Register& rd, const Operand& operand);
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D | assembler-aarch64.cc | 574 void Assembler::ngcs(const Register& rd, const Operand& operand) { in ngcs() function in vixl::aarch64::Assembler
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 610 def : InstAlias<"ngcs $dst, $src", (SBCSWr GPR32:$dst, WZR, GPR32:$src)>; 611 def : InstAlias<"ngcs $dst, $src", (SBCSXr GPR64:$dst, XZR, GPR64:$src)>;
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/external/capstone/arch/AArch64/ |
D | AArch64GenAsmWriter.inc | 10491 AsmString = "ngcs $\x01, $\x03"; 10503 AsmString = "ngcs $\x01, $\x03";
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 2007 void ngcs(const Register& rd, const Operand& operand)
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1343 def : InstAlias<"ngcs $dst, $src", (SBCSWr GPR32:$dst, WZR, GPR32:$src)>; 1344 def : InstAlias<"ngcs $dst, $src", (SBCSXr GPR64:$dst, XZR, GPR64:$src)>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1200 def : InstAlias<"ngcs $dst, $src", (SBCSWr GPR32:$dst, WZR, GPR32:$src)>; 1201 def : InstAlias<"ngcs $dst, $src", (SBCSXr GPR64:$dst, XZR, GPR64:$src)>;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12545 "c\004ngcs\006nmatch\003nop\003nor\004nors\003not\004nots\003orn\004orns" 16809 …{ 3452 /* ngcs */, AArch64::SBCSWr, Convert__Reg1_0__regWZR__Reg1_1, AMFBS_None, { MCK_GPR32, MCK_… 16810 …{ 3452 /* ngcs */, AArch64::SBCSXr, Convert__Reg1_0__regXZR__Reg1_1, AMFBS_None, { MCK_GPR64, MCK_… 24182 …{ 3452 /* ngcs */, AArch64::SBCSWr, Convert__Reg1_0__regWZR__Reg1_1, AMFBS_None, { MCK_GPR32, MCK_… 24183 …{ 3452 /* ngcs */, AArch64::SBCSXr, Convert__Reg1_0__regXZR__Reg1_1, AMFBS_None, { MCK_GPR64, MCK_…
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