| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_compiler_nir.h | 91 dest_index(nir_function_impl *impl, nir_dest *dest) in dest_index()
97 update_swiz_mask(nir_alu_instr *alu, nir_dest *dest, unsigned *swiz, unsigned *mask) in update_swiz_mask()
122 static nir_dest *
123 real_dest(nir_dest *dest, unsigned *swiz, unsigned *mask) in real_dest()
200 static inline nir_dest *
203 nir_dest *dest = NULL; in dest_for_instr()
230 nir_dest *dest; /* cached dest_for_instr */
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| D | etnaviv_compiler_nir_ra.c | 145 nir_dest *dest = defs[i].dest; in etna_ra_assign()
182 nir_dest *dest = dest_for_instr(instr); in etna_ra_assign()
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| D | etnaviv_compiler_nir_liveness.c | 134 nir_dest *dest = dest_for_instr(instr); in etna_live_defs()
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| /external/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_emitinstruction.h | 60 PValue from_nir(const nir_dest& v, unsigned component);
63 int lookup_register_index(const nir_dest& dst);
88 GPRVector vec_from_nir(const nir_dest& dst, int num_components);
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| D | sfn_valuepool.h | 90 GPRVector vec_from_nir(const nir_dest& dst, int num_components);
92 std::vector<PValue> varvec_from_nir(const nir_dest& src, int num_components);
118 PValue from_nir(const nir_dest& v, unsigned component);
130 int lookup_register_index(const nir_dest& dst);
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| D | sfn_emitinstruction.cpp | 68 PValue EmitInstruction::from_nir(const nir_dest& v, unsigned component) in from_nir()
122 int EmitInstruction::lookup_register_index(const nir_dest& dst) in lookup_register_index()
152 GPRVector EmitInstruction::vec_from_nir(const nir_dest& dst, int num_components) in vec_from_nir()
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| D | sfn_valuepool.cpp | 50 GPRVector ValuePool::vec_from_nir(const nir_dest& dst, int num_components) in vec_from_nir()
58 std::vector<PValue> ValuePool::varvec_from_nir(const nir_dest& dst, int num_components) in varvec_from_nir()
189 int ValuePool::lookup_register_index(const nir_dest& dst) in lookup_register_index()
225 PValue ValuePool::from_nir(const nir_dest& v, unsigned component) in from_nir()
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| D | sfn_shader_base.h | 117 bool load_preloaded_value(const nir_dest& dest, int chan, PValue value,
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| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_context.h | 178 struct ir3_instruction ** ir3_get_dst(struct ir3_context *ctx, nir_dest *dst, unsigned n);
180 void ir3_put_dst(struct ir3_context *ctx, nir_dest *dst);
222 static inline type_t utype_dst(nir_dest dst) in utype_dst()
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| D | ir3_context.c | 187 ir3_get_dst(struct ir3_context *ctx, nir_dest *dst, unsigned n) in ir3_get_dst()
238 ir3_put_dst(struct ir3_context *ctx, nir_dest *dst) in ir3_put_dst()
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| /external/mesa3d/src/panfrost/util/ |
| D | pan_ir.h | 82 panfrost_sysval_for_instr(nir_instr *instr, nir_dest *dest);
219 pan_dest_index(nir_dest *dst) in pan_dest_index()
234 bool pan_has_dest_mod(nir_dest **dest, nir_op op);
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| D | nir_mod_helpers.c | 82 pan_has_dest_mod(nir_dest **odest, nir_op op) in pan_has_dest_mod()
88 nir_dest *dest = *odest; in pan_has_dest_mod()
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| D | pan_sysval.c | 72 panfrost_sysval_for_instr(nir_instr *instr, nir_dest *dest) in panfrost_sysval_for_instr()
75 nir_dest *dst = NULL; in panfrost_sysval_for_instr()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir.h | 891 } nir_dest; typedef
893 static inline nir_dest
896 nir_dest dest = { { { NULL } } }; in nir_dest_init()
903 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
906 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
932 static inline nir_dest
935 nir_dest dest = NIR_DEST_INIT; in nir_dest_for_reg()
969 nir_dest_bit_size(nir_dest dest) in nir_dest_bit_size()
975 nir_dest_num_components(nir_dest dest) in nir_dest_num_components()
981 nir_dest_is_divergent(nir_dest dest) in nir_dest_is_divergent()
[all …]
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| D | nir.c | 300 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr) in nir_dest_copy()
488 dest_init(nir_dest *dest) in dest_init()
888 add_reg_def_cb(nir_dest *dest, void *state) in add_reg_def_cb()
977 remove_def_cb(nir_dest *dest, void *state) in remove_def_cb()
1102 nir_ssa_def_visitor(nir_dest *dest, void *void_state) in nir_ssa_def_visitor()
1296 visit_dest_indirect(nir_dest *dest, void *_state) in visit_dest_indirect()
1544 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest) in nir_instr_rewrite_dest()
1595 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest, in nir_ssa_dest_init()
2014 dest_is_ssa(nir_dest *dest, void *_state) in dest_is_ssa()
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| D | nir_schedule.c | 189 nir_schedule_dest_pressure(nir_dest *dest) in nir_schedule_dest_pressure()
262 nir_schedule_reg_dest_deps(nir_dest *dest, void *in_state) in nir_schedule_reg_dest_deps()
557 nir_schedule_regs_freed_dest_cb(nir_dest *dest, void *in_state) in nir_schedule_regs_freed_dest_cb()
904 nir_schedule_mark_dest_scheduled(nir_dest *dest, void *state) in nir_schedule_mark_dest_scheduled()
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| D | nir_propagate_invariant.c | 44 dest_is_invariant(nir_dest *dest, struct set *invariants) in dest_is_invariant()
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| D | nir_sweep.c | 53 sweep_dest_indirect(nir_dest *dest, void *nir) in sweep_dest_indirect()
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| D | nir_from_ssa.c | 532 nir_dest *dest = exec_node_data(nir_dest, def, ssa); in rewrite_ssa_def()
941 dest_replace_ssa_with_reg(nir_dest *dest, void *void_state) in dest_replace_ssa_with_reg()
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| D | nir_gather_ssa_types.c | 72 copy_types(nir_src src, nir_dest *dest, BITSET_WORD *float_types, in copy_types()
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| D | nir_lower_vec_to_movs.c | 37 src_matches_dest_reg(nir_dest *dest, nir_src *src) in src_matches_dest_reg()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4.h | 341 dst_reg get_nir_dest(const nir_dest &dest, enum brw_reg_type type);
342 dst_reg get_nir_dest(const nir_dest &dest, nir_alu_type type);
343 dst_reg get_nir_dest(const nir_dest &dest);
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir2_nir.c | 252 set_index(struct ir2_context *ctx, nir_dest * dst, in set_index()
361 instr_create_alu_dest(struct ir2_context *ctx, nir_op opcode, nir_dest *dst) in instr_create_alu_dest()
370 ir2_instr_create_fetch(struct ir2_context *ctx, nir_dest *dst, in ir2_instr_create_fetch()
400 nir_dest *dst = &alu->dest.dest; in emit_alu()
486 load_input(struct ir2_context *ctx, nir_dest *dst, unsigned idx) in load_input()
789 &(nir_dest) {.ssa = undef->def,.is_ssa = true}); in emit_undef()
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| /external/mesa3d/src/gallium/drivers/lima/ir/gp/ |
| D | nir.c | 107 static void register_node(gpir_block *block, gpir_node *node, nir_dest *dest) in register_node()
220 static gpir_node *gpir_create_load(gpir_block *block, nir_dest *dest, in gpir_create_load()
234 static bool gpir_create_vector_load(gpir_block *block, nir_dest *dest, int index) in gpir_create_vector_load()
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| /external/mesa3d/src/panfrost/midgard/ |
| D | midgard_compile.c | 475 mir_accept_dest_mod(compiler_context *ctx, nir_dest **dest, nir_op op) in mir_accept_dest_mod()
500 mir_determine_float_outmod(compiler_context *ctx, nir_dest **dest, unsigned prior_outmod) in mir_determine_float_outmod()
599 nir_dest *dest = &instr->dest.dest; in mir_is_bcsel_float()
610 nir_dest *dest = &instr->dest.dest; in emit_alu()
1286 nir_dest nir_dest; in emit_sysval_read() local
1289 int sysval = panfrost_sysval_for_instr(instr, &nir_dest); in emit_sysval_read()
1292 unsigned dest = nir_dest_index(&nir_dest); in emit_sysval_read()
1912 nir_dest *dest = &instr->dest; in emit_texop_native()
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