/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | not.ll | 40 ; MM: not16 $2, $4 54 ; MM: not16 $2, $4 68 ; MM: not16 $2, $4 82 ; MM: not16 $2, $4 98 ; MM32: not16 $2, $4 99 ; MM32: not16 $3, $5 121 ; MM32: not16 $2, $4 122 ; MM32: not16 $3, $5 123 ; MM32: not16 $4, $6 124 ; MM32: not16 $5, $7 [all …]
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D | lshr.ll | 127 ; MMR3: not16 $[[T2:[0-9]+]], $7 138 ; MMR6: not16 $[[T2:[0-9]+]], $7
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D | ashr.ll | 133 ; MMR3: not16 $[[T2:[0-9]+]], $7 150 ; MMR6: not16 $[[T8:[0-9]+]], $7
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D | shl.ll | 143 ; MMR3: not16 $[[T2:[0-9]+]], $7 154 ; MMR6: not16 $[[T2:[0-9]+]], $7
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/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/ |
D | not.ll | 38 ; MM: not16 $2, $4 52 ; MM: not16 $2, $4 66 ; MM: not16 $2, $4 81 ; MM: not16 $2, $4 97 ; MM32: not16 $2, $4 98 ; MM32: not16 $3, $5 117 ; MM32: not16 $2, $4 118 ; MM32: not16 $3, $5 119 ; MM32: not16 $4, $6 120 ; MM32: not16 $5, $7
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D | ashr.ll | 363 ; MMR3-NEXT: not16 $3, $7 383 ; MMR6-NEXT: not16 $6, $7 775 ; MMR3-NEXT: not16 $3, $16 800 ; MMR3-NEXT: not16 $5, $2 810 ; MMR3-NEXT: not16 $4, $7 864 ; MMR6-NEXT: not16 $7, $7 871 ; MMR6-NEXT: not16 $16, $3 887 ; MMR6-NEXT: not16 $16, $2
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D | lshr.ll | 365 ; MMR3-NEXT: not16 $3, $7 379 ; MMR6-NEXT: not16 $2, $7 793 ; MMR3-NEXT: not16 $3, $16 809 ; MMR3-NEXT: not16 $5, $3 820 ; MMR3-NEXT: not16 $3, $7 868 ; MMR6-NEXT: not16 $5, $3 880 ; MMR6-NEXT: not16 $16, $5 901 ; MMR6-NEXT: not16 $2, $2
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D | shl.ll | 425 ; MMR3-NEXT: not16 $2, $7 439 ; MMR6-NEXT: not16 $2, $7 867 ; MMR3-NEXT: not16 $4, $16 884 ; MMR3-NEXT: not16 $2, $4 896 ; MMR3-NEXT: not16 $3, $6 942 ; MMR6-NEXT: not16 $2, $3 959 ; MMR6-NEXT: not16 $17, $17 969 ; MMR6-NEXT: not16 $17, $4
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/external/llvm-project/llvm/test/MC/Mips/ |
D | micromips-16-bit-instructions.s | 16 # CHECK-EL: not16 $17, $3 # encoding: [0x0b,0x44] 71 # CHECK-EB: not16 $17, $3 # encoding: [0x44,0x0b] 124 not16 $17, $3
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D | micromips-invalid.s | 13 not16 $18, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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/external/llvm/test/MC/Mips/ |
D | micromips-16-bit-instructions.s | 16 # CHECK-EL: not16 $17, $3 # encoding: [0x0b,0x44] 71 # CHECK-EB: not16 $17, $3 # encoding: [0x44,0x0b] 124 not16 $17, $3
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D | micromips-invalid.s | 13 not16 $18, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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/external/llvm-project/llvm/test/CodeGen/Mips/ |
D | micromips-not16.ll | 26 ; CHECK: not16
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/external/llvm/test/CodeGen/Mips/ |
D | micromips-not16.ll | 26 ; CHECK: not16
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/external/llvm-project/llvm/test/MC/Mips/micromips/ |
D | valid.s | 24 not16 $17, $3 # CHECK: not16 $17, $3 # encoding: [0x44,0x0b] label
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/external/llvm/test/MC/Mips/micromips64r6/ |
D | valid.s | 34 not16 $4, $7 # CHECK: not16 $4, $7 # encoding: [0x46,0x70]
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/external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
D | valid-el.txt | 14 0x0b 0x44 # CHECK: not16 $17, $3
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D | valid.txt | 14 0x44 0x0b # CHECK: not16 $17, $3
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/external/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 249 not16 $4, $7 # CHECK: not16 $4, $7 # encoding: [0x46,0x70]
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/external/llvm-project/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 298 not16 $4, $7 # CHECK: not16 $4, $7 # encoding: [0x46,0x70]
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/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
D | valid-el.txt | 14 0x0b 0x44 # CHECK: not16 $17, $3
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D | valid.txt | 14 0x44 0x0b # CHECK: not16 $17, $3
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/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 28 0x46 0x70 # CHECK: not16 $4, $7
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/external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 28 0x46 0x70 # CHECK: not16 $4, $7
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/external/llvm/lib/Target/Mips/ |
D | MicroMips32r6InstrInfo.td | 1095 class NOT16_MMR6_DESC : NotMM16<"not16", GPRMM16Opnd>, MMR6Arch<"not16"> {
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