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Searched refs:num_regs (Results 1 – 25 of 34) sorted by relevance

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/external/ethtool/
Dvioc.c18 unsigned int num_regs; in vioc_dump_regs() local
27 num_regs = regs->len/VIOC_REGS_LINE_SIZE; in vioc_dump_regs()
29 for (i = 0; i < num_regs; i++){ in vioc_dump_regs()
/external/mesa3d/src/gallium/auxiliary/util/
Du_simple_shaders.c1079 unsigned num_regs; in util_make_tess_ctrl_passthrough_shader() local
1094 num_regs = 0; in util_make_tess_ctrl_passthrough_shader()
1111 dst[num_regs] = ureg_DECL_output(ureg, in util_make_tess_ctrl_passthrough_shader()
1114 src[num_regs] = ureg_DECL_input(ureg, vs_semantic_names[j], in util_make_tess_ctrl_passthrough_shader()
1120 src[num_regs] = ureg_src_dimension(src[num_regs], 0); in util_make_tess_ctrl_passthrough_shader()
1121 dst[num_regs] = ureg_dst_dimension(dst[num_regs], 0); in util_make_tess_ctrl_passthrough_shader()
1124 num_regs++; in util_make_tess_ctrl_passthrough_shader()
1134 dst[num_regs] = ureg_DECL_output(ureg, TGSI_SEMANTIC_TESSOUTER, in util_make_tess_ctrl_passthrough_shader()
1135 num_regs); in util_make_tess_ctrl_passthrough_shader()
1136 src[num_regs] = ureg_DECL_constant(ureg, 0); in util_make_tess_ctrl_passthrough_shader()
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/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterContextMemory.cpp31 const size_t num_regs = reg_infos.GetNumRegisters(); in RegisterContextMemory() local
32 assert(num_regs > 0); in RegisterContextMemory()
33 m_reg_valid.resize(num_regs); in RegisterContextMemory()
DDynamicRegisterInfo.cpp84 const uint32_t num_regs = regs->GetSize(); in SetRegisterInfo() local
88 for (uint32_t i = 0; i < num_regs; ++i) { in SetRegisterInfo()
350 const size_t num_regs = invalidate_reg_list->GetSize(); in SetRegisterInfo() local
351 if (num_regs > 0) { in SetRegisterInfo()
352 for (uint32_t idx = 0; idx < num_regs; ++idx) { in SetRegisterInfo()
486 const size_t num_regs = m_regs.size(); in Finalize() local
487 for (size_t i = 0; i < num_regs; ++i) { in Finalize()
550 for (size_t i = 0; i < num_regs; ++i) { in Finalize()
721 const size_t num_regs = m_regs.size(); in Dump() local
723 static_cast<const void *>(this), static_cast<uint64_t>(num_regs)); in Dump()
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DRegisterContextPOSIX_mips64.cpp162 const uint32_t num_regs = m_num_registers; in ConvertRegisterKindToRegisterNumber() local
165 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) { in ConvertRegisterKindToRegisterNumber()
/external/arm-trusted-firmware/include/lib/el3_runtime/aarch32/
Dcontext.h38 #define DEFINE_REG_STRUCT(name, num_regs) \ argument
40 uint32_t ctx_regs[num_regs]; \
/external/llvm-project/lldb/source/Plugins/Process/Windows/Common/
DRegisterContextWindows.cpp61 const uint32_t num_regs = GetRegisterCount(); in ConvertRegisterKindToRegisterNumber() local
64 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) { in ConvertRegisterKindToRegisterNumber()
/external/mesa3d/src/intel/compiler/
Dbrw_wm_iz.cpp168 payload.num_regs = reg; in setup_fs_payload_gen4()
Dbrw_eu_emit.c588 unsigned num_regs, in gen7_set_dp_scratch_message() argument
595 assert(num_regs == 1 || num_regs == 2 || num_regs == 4 || in gen7_set_dp_scratch_message()
596 (devinfo->gen >= 8 && num_regs == 8)); in gen7_set_dp_scratch_message()
597 const unsigned block_size = (devinfo->gen >= 8 ? util_logbase2(num_regs) : in gen7_set_dp_scratch_message()
598 num_regs - 1); in gen7_set_dp_scratch_message()
2101 int num_regs, in brw_oword_block_write_scratch() argument
2117 const unsigned mlen = 1 + num_regs; in brw_oword_block_write_scratch()
2196 BRW_DATAPORT_OWORD_BLOCK_DWORDS(num_regs * 8), in brw_oword_block_write_scratch()
2214 int num_regs, in brw_oword_block_read_scratch() argument
2237 const unsigned rlen = num_regs; in brw_oword_block_read_scratch()
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Dbrw_fs.cpp1648 struct brw_reg brw_reg = brw_vec1_grf(payload.num_regs + in assign_curb_setup()
1670 struct brw_reg mask = brw_vec1_grf(payload.num_regs + mask_param / 8, in assign_curb_setup()
1690 retype(brw_vec8_grf(payload.num_regs + i, 0), in assign_curb_setup()
1701 this->first_non_payload_grf = payload.num_regs + prog_data->curb_read_length; in assign_curb_setup()
1822 int urb_start = payload.num_regs + prog_data->base.curb_read_length; in assign_urb_setup()
1860 int grf = payload.num_regs + in convert_attr_sources_to_hw_regs()
7439 payload.num_regs++; in setup_fs_payload_gen6()
7443 payload.subspan_coord_reg[j] = payload.num_regs++; in setup_fs_payload_gen6()
7456 payload.barycentric_coord_reg[i][j] = payload.num_regs; in setup_fs_payload_gen6()
7457 payload.num_regs += payload_width / 4; in setup_fs_payload_gen6()
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Dbrw_eu.h1143 int num_regs,
1148 int num_regs,
1153 int num_regs,
Dbrw_vec4.cpp2012 const unsigned num_regs = DIV_ROUND_UP(size_written, REG_SIZE); in fixup_3src_null_dest() local
2014 inst->dst = retype(dst_reg(VGRF, alloc.allocate(num_regs)), in fixup_3src_null_dest()
2300 unsigned num_regs = DIV_ROUND_UP(size_written, REG_SIZE); in lower_simd_width() local
2301 dst = retype(dst_reg(VGRF, alloc.allocate(num_regs)), in lower_simd_width()
2952 prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; in brw_compile_vs()
Dbrw_vec4_tcs.cpp466 prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; in brw_compile_tcs()
/external/igt-gpu-tools/assembler/
Dbrw_eu.h298 int num_regs,
303 int num_regs,
/external/llvm-project/lldb/unittests/Process/minidump/
DRegisterContextMinidumpTest.cpp191 size_t num_regs = RegisterContextMinidump_ARM::GetRegisterCountStatic(); in TEST() local
193 for (size_t reg=0; reg<num_regs; ++reg) { in TEST()
/external/llvm-project/lldb/tools/lldb-vscode/
DVSCode.cpp31 : variables(), broadcaster("lldb-vscode"), num_regs(0), num_locals(0), in VSCode()
286 scopes.emplace_back(CreateScope("Registers", VARREF_REGS, num_regs, false)); in CreateTopLevelScopes()
DVSCode.h86 int64_t num_regs; member
Dlldb-vscode.cpp1810 g_vsc.num_regs = in request_scopes()
2668 end_idx = start_idx + g_vsc.num_regs; in request_setVariable()
2835 num_children = g_vsc.num_regs; in request_variables()
/external/llvm-project/lldb/source/Host/common/
DNativeRegisterContext.cpp415 const uint32_t num_regs = GetRegisterCount(); in ConvertRegisterKindToRegisterNumber() local
418 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) { in ConvertRegisterKindToRegisterNumber()
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnvfx_fragprog.c32 int num_regs; member
178 if (fpc->num_regs < (dst.index + 1)) in emit_dst()
179 fpc->num_regs = dst.index + 1; in emit_dst()
1081 fpc->num_regs = 2; in _nvfx_fragprog_translate()
1125 fp->fp_control |= (fpc->num_regs-1)/2; in _nvfx_fragprog_translate()
1127 fp->fp_control |= fpc->num_regs << NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT; in _nvfx_fragprog_translate()
/external/llvm-project/lldb/source/Target/
DRegisterContext.cpp282 const uint32_t num_regs = GetRegisterCount(); in ConvertRegisterKindToRegisterNumber() local
285 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) { in ConvertRegisterKindToRegisterNumber()
/external/arm-trusted-firmware/include/lib/el3_runtime/aarch64/
Dcontext.h338 #define DEFINE_REG_STRUCT(name, num_regs) \ argument
340 uint64_t ctx_regs[num_regs]; \
/external/llvm-project/lldb/source/API/
DSBFrame.cpp636 const uint32_t num_regs = reg_ctx->GetRegisterCount(); in FindValue() local
637 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) { in FindValue()
956 const uint32_t num_regs = reg_ctx->GetRegisterCount(); in FindRegister() local
957 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) { in FindRegister()
/external/vixl/src/aarch64/
Dassembler-sve-aarch64.cc3813 void Assembler::SVELdSt234Helper(int num_regs, in SVELdSt234Helper() argument
3818 VIXL_ASSERT((num_regs >= 2) && (num_regs <= 4)); in SVELdSt234Helper()
3821 Instr num = (num_regs - 1) << 21; in SVELdSt234Helper()
3823 Instr mem_op = SVEMemOperandHelper(msize_in_bytes_log2, num_regs, addr); in SVELdSt234Helper()
4021 void Assembler::SVELd234Helper(int num_regs, in SVELd234Helper() argument
4039 SVELdSt234Helper(num_regs, zt1, pg, addr, op); in SVELd234Helper()
4981 int num_regs, in SVEMemOperandHelper() argument
4984 VIXL_ASSERT((num_regs >= 1) && (num_regs <= 4)); in SVEMemOperandHelper()
4990 VIXL_ASSERT((imm % num_regs) == 0); in SVEMemOperandHelper()
4991 op = RnSP(addr.GetScalarBase()) | ImmField<19, 16>(imm / num_regs); in SVEMemOperandHelper()
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/external/kernel-headers/original/uapi/sound/
Dasoc.h447 __le32 num_regs; member

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