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Searched refs:nxv16f16 (Results 1 – 11 of 11) sorted by relevance

/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h213 nxv16f16 = 143, // n x 16 x f16 enumerator
592 case nxv16f16: in getVectorElementType()
707 case nxv16f16: in getVectorNumElements()
923 case nxv16f16: in getSizeInBits()
1276 if (NumElements == 16) return MVT::nxv16f16; in getScalableVectorVT()
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-ldN-reg+reg-addr-mode.ll27 define <vscale x 16 x half> @ld2.nxv16f16(<vscale x 8 x i1> %Pg, half *%addr, i64 %a) {
28 ; CHECK-LABEL: ld2.nxv16f16:
32 %res = call <vscale x 16 x half> @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1.p0f16(<vscale x 8 x i1> %Pg,…
239 declare <vscale x 16 x half> @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1.p0f16(<vscale x 8 x i1>, half*)
Dsve-intrinsics-create-tuple.ll77 …%tuple = tail call <vscale x 16 x half> @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16(<vscale x…
82 …%extract = tail call <vscale x 8 x half> @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16(<vscale x 16…
91 …%tuple = tail call <vscale x 16 x half> @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16(<vscale x…
96 …%extract = tail call <vscale x 8 x half> @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16(<vscale x 16…
757 declare <vscale x 16 x half> @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16(<vscale x 8 x half>,…
802 declare <vscale x 8 x half> @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16(<vscale x 16 x half>, i32 …
Dsve-intrinsics-ldN-reg+imm-addr-mode.ll88 define <vscale x 16 x half> @ld2.nxv16f16(<vscale x 8 x i1> %Pg, <vscale x 8 x half>* %addr) {
89 ; CHECK-LABEL: ld2.nxv16f16:
94 %res = call <vscale x 16 x half> @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1.p0f16(<vscale x 8 x i1> %Pg,…
475 declare <vscale x 16 x half> @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1.p0f16(<vscale x 8 x i1>, half*)
Dsve-fp.ll604 …%res = call <vscale x 16 x half> @llvm.maxnum.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x hal…
697 …%res = call <vscale x 16 x half> @llvm.minnum.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x hal…
812 declare <vscale x 16 x half> @llvm.maxnum.nxv16f16(<vscale x 16 x half>, <vscale x 16 x half>)
821 declare <vscale x 16 x half> @llvm.minnum.nxv16f16(<vscale x 16 x half>, <vscale x 16 x half>)
Dsve-intrinsics-loads.ll313 …%res = call <vscale x 16 x half> @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1.p0f16(<vscale x 8 x i1> %pr…
548 declare <vscale x 16 x half> @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1.p0f16(<vscale x 8 x i1>, half*)
/external/llvm-project/llvm/lib/Target/RISCV/Utils/
DRISCVBaseInfo.h309 constexpr MVT vfloat16m4_t = MVT::nxv16f16;
/external/llvm-project/llvm/include/llvm/CodeGen/
DValueTypes.td177 def nxv16f16 : ValueType<256,143>; // n x 16 x f16 vector value
/external/llvm-project/llvm/lib/CodeGen/
DValueTypes.cpp454 case MVT::nxv16f16: in getTypeForEVT()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVRegisterInfo.td288 // half N/A nxv1f16 nxv2f16 nxv4f16 nxv8f16 nxv16f16 nxv32f16
/external/llvm-project/llvm/utils/TableGen/
DCodeGenTarget.cpp209 case MVT::nxv16f16: return "MVT::nxv16f16"; in getEnumName()