Searched refs:nxv32f16 (Results 1 – 10 of 10) sorted by relevance
| /external/llvm-project/llvm/include/llvm/Support/ |
| D | MachineValueType.h | 214 nxv32f16 = 144, // n x 32 x f16 enumerator
593 case nxv32f16: return f16; in getVectorElementType()
692 case nxv32f16: return 32; in getVectorNumElements()
939 case nxv32f16: in getSizeInBits()
1277 if (NumElements == 32) return MVT::nxv32f16; in getScalableVectorVT()
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | sve-intrinsics-ldN-reg+reg-addr-mode.ll | 179 define <vscale x 32 x half> @ld4.nxv32f16(<vscale x 8 x i1> %Pg, half *%addr, i64 %a) {
180 ; CHECK-LABEL: ld4.nxv32f16:
184 %res = call <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1.p0f16(<vscale x 8 x i1> %Pg,…
257 declare <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1.p0f16(<vscale x 8 x i1>, half*)
|
| D | sve-intrinsics-create-tuple.ll | 573 …%tuple = tail call <vscale x 32 x half> @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16(<vscale x…
578 …%extract = tail call <vscale x 8 x half> @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16(<vscale x 32…
587 …%tuple = tail call <vscale x 32 x half> @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16(<vscale x…
592 …%extract = tail call <vscale x 8 x half> @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16(<vscale x 32…
775 declare <vscale x 32 x half> @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16(<vscale x 8 x half>,…
804 declare <vscale x 8 x half> @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16(<vscale x 32 x half>, i32 …
|
| D | sve-intrinsics-ldN-reg+imm-addr-mode.ll | 409 define <vscale x 32 x half> @ld4.nxv32f16(<vscale x 8 x i1> %Pg, <vscale x 8 x half> *%addr) {
410 ; CHECK-LABEL: ld4.nxv32f16:
415 %res = call <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1.p0f16(<vscale x 8 x i1> %Pg,…
493 declare <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1.p0f16(<vscale x 8 x i1>, half*)
|
| D | sve-intrinsics-loads.ll | 473 …%res = call <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1.p0f16(<vscale x 8 x i1> %pr…
566 declare <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1.p0f16(<vscale x 8 x i1>, half*)
|
| /external/llvm-project/llvm/lib/Target/RISCV/Utils/ |
| D | RISCVBaseInfo.h | 310 constexpr MVT vfloat16m8_t = MVT::nxv32f16;
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.td | 178 def nxv32f16 : ValueType<512,144>; // n x 32 x f16 vector value
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | ValueTypes.cpp | 456 case MVT::nxv32f16: in getTypeForEVT()
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVRegisterInfo.td | 288 // half N/A nxv1f16 nxv2f16 nxv4f16 nxv8f16 nxv16f16 nxv32f16
|
| /external/llvm-project/llvm/utils/TableGen/ |
| D | CodeGenTarget.cpp | 210 case MVT::nxv32f16: return "MVT::nxv32f16"; in getEnumName()
|