Searched refs:nxv64i8 (Results 1 – 11 of 11) sorted by relevance
/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | sve-intrinsics-ldN-reg+imm-addr-mode.ll | 299 define <vscale x 64 x i8> @ld4.nxv64i8(<vscale x 16 x i1> %Pg, <vscale x 16 x i8> *%addr) { 300 ; CHECK-LABEL: ld4.nxv64i8: 305 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 315 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 325 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 336 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 347 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 358 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 376 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 394 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… [all …]
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D | sve-intrinsics-ldN-reg+reg-addr-mode.ll | 160 define <vscale x 64 x i8> @ld4.nxv64i8(<vscale x 16 x i1> %Pg, i8 *%addr, i64 %a) { 161 ; CHECK-LABEL: ld4.nxv64i8: 165 %res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i… 253 declare <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1>, i8*)
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D | sve-intrinsics-create-tuple.ll | 511 …%tuple = tail call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8(<vscale x 16… 516 …%extract = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x… 525 …%tuple = tail call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8(<vscale x 16… 530 …%extract = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x… 780 declare <vscale x 64 x i8> @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8(<vscale x 16 x i8>, <vs… 784 declare <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8>, i32 imma…
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D | sve-calling-convention-tuple-types.ll | 306 …%tuple = tail call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8(<vscale x 16… 317 …%tuple = tail call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8(<vscale x 16… 498 declare <vscale x 64 x i8> @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8(<vscale x 16 x i8>, <vsc…
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D | sve-intrinsics-loads.ll | 453 …%res = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1> %pred… 562 declare <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1.p0i8(<vscale x 16 x i1>, i8*)
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/external/llvm-project/llvm/include/llvm/Support/ |
D | MachineValueType.h | 183 nxv64i8 = 120, // n x 64 x i8 enumerator 528 case nxv64i8: return i8; in getVectorElementType() 677 case nxv64i8: return 64; in getVectorNumElements() 935 case nxv64i8: in getSizeInBits() 1245 if (NumElements == 64) return MVT::nxv64i8; in getScalableVectorVT()
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/external/llvm-project/llvm/lib/Target/RISCV/Utils/ |
D | RISCVBaseInfo.h | 285 constexpr MVT vint8m8_t = MVT::nxv64i8;
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/external/llvm-project/llvm/lib/Target/RISCV/ |
D | RISCVRegisterInfo.td | 285 // i8 nxv1i8 nxv2i8 nxv4i8 nxv8i8 nxv16i8 nxv32i8 nxv64i8 297 defvar vint8m8_t = nxv64i8;
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/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | ValueTypes.td | 150 def nxv64i8 : ValueType<512, 120>; // n x 64 x i8 vector value
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/external/llvm-project/llvm/lib/CodeGen/ |
D | ValueTypes.cpp | 408 case MVT::nxv64i8: in getTypeForEVT()
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/external/llvm-project/llvm/utils/TableGen/ |
D | CodeGenTarget.cpp | 186 case MVT::nxv64i8: return "MVT::nxv64i8"; in getEnumName()
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