| /external/llvm-project/lldb/include/lldb/Core/ |
| D | EmulateInstruction.h | 195 RegisterInfo offset_reg; // offset register kind member
206 RegisterInfo offset_reg; // offset register for address calculation member
249 RegisterInfo offset_reg) { in SetRegisterPlusIndirectOffset()
252 info.RegisterPlusIndirectOffset.offset_reg = offset_reg; in SetRegisterPlusIndirectOffset()
265 RegisterInfo offset_reg, in SetRegisterToRegisterPlusIndirectOffset()
269 info.RegisterToRegisterPlusIndirectOffset.offset_reg = offset_reg; in SetRegisterToRegisterPlusIndirectOffset()
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| /external/mesa3d/src/broadcom/compiler/ |
| D | v3d_nir_lower_io.c | 172 nir_ssa_def *offset_reg = in v3d_nir_lower_vpm_output() local
192 v3d_nir_store_output(b, state->psiz_vpm_offset, offset_reg, src); in v3d_nir_lower_vpm_output()
252 offset_reg, nir_channel(b, src, i)); in v3d_nir_lower_vpm_output()
522 nir_ssa_def *offset_reg = in v3d_nir_emit_ff_vpm_outputs() local
536 offset_reg, state->pos[i]); in v3d_nir_emit_ff_vpm_outputs()
564 offset_reg, pos); in v3d_nir_emit_ff_vpm_outputs()
573 v3d_nir_store_output(b, state->zs_vpm_offset, offset_reg, z); in v3d_nir_emit_ff_vpm_outputs()
578 offset_reg, rcp_wc); in v3d_nir_emit_ff_vpm_outputs()
600 offset_reg, nir_imm_int(b, 0)); in v3d_nir_emit_ff_vpm_outputs()
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| /external/capstone/cstool/ |
| D | cstool_m680x.c | 116 if (op->idx.offset_reg != M680X_REG_INVALID) in print_insn_detail_m680x()
118 cs_reg_name(handle, op->idx.offset_reg)); in print_insn_detail_m680x()
121 (op->idx.offset_reg == M680X_REG_INVALID) && in print_insn_detail_m680x()
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| /external/capstone/suite/cstest/src/ |
| D | m680x_detail.c | 101 if (op->idx.offset_reg != M680X_REG_INVALID) in get_detail_m680x()
102 add_str(&result, " ; offset register: %s", cs_reg_name(*handle, op->idx.offset_reg)); in get_detail_m680x()
105 (op->idx.offset_reg == M680X_REG_INVALID) && in get_detail_m680x()
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| /external/capstone/bindings/python/ |
| D | test_m680x.py | 95 if i.idx.offset_reg != M680X_REG_INVALID:
96 print("\t\t\toffset register: %s" % insn.reg_name(i.idx.offset_reg))
97 … if (i.idx.offset_bits != 0) and (i.idx.offset_reg == M680X_REG_INVALID) and (i.idx.inc_dec == 0):
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_gs_nir.cpp | 46 const unsigned offset_reg = nir_src_as_uint(instr->src[1]); in nir_emit_intrinsic() local
54 instr->const_index[0] + offset_reg, in nir_emit_intrinsic()
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| D | brw_vec4_nir.cpp | 471 src_reg offset_reg = retype(get_nir_src_imm(instr->src[2]), in nir_emit_intrinsic() local
518 emit_untyped_write(bld, surf_index, offset_reg, val_reg, in nir_emit_intrinsic()
531 src_reg offset_reg = retype(get_nir_src_imm(instr->src[1]), in nir_emit_intrinsic() local
538 src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg, in nir_emit_intrinsic()
650 src_reg offset_reg; in nir_emit_intrinsic() local
653 offset_reg = brw_imm_ud(load_offset & ~15); in nir_emit_intrinsic()
655 offset_reg = src_reg(this, glsl_type::uint_type); in nir_emit_intrinsic()
656 emit(MOV(dst_reg(offset_reg), in nir_emit_intrinsic()
665 offset_reg, in nir_emit_intrinsic()
672 surf_index, offset_reg, NULL, NULL); in nir_emit_intrinsic()
[all …]
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| D | brw_vec4_visitor.cpp | 734 src_reg offset_reg, in emit_pull_constant_load_reg() argument
746 grf_offset.type = offset_reg.type; in emit_pull_constant_load_reg()
748 pull = MOV(grf_offset, offset_reg); in emit_pull_constant_load_reg()
764 offset_reg); in emit_pull_constant_load_reg()
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| /external/capstone/tests/ |
| D | test_m680x.c | 142 if (op->idx.offset_reg != M680X_REG_INVALID) in print_insn_detail()
144 cs_reg_name(handle, op->idx.offset_reg)); in print_insn_detail()
147 (op->idx.offset_reg == M680X_REG_INVALID) && in print_insn_detail()
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| /external/capstone/bindings/java/ |
| D | TestM680x.java | 100 if (i.value.idx.offset_reg != M680X_REG_INVALID) { in print_ins_detail()
101 String regName = ins.regName(i.value.idx.offset_reg); in print_ins_detail()
106 (i.value.idx.offset_reg == M680X_REG_INVALID) && in print_ins_detail()
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| /external/mesa3d/src/gallium/drivers/lima/ir/pp/ |
| D | codegen.h | 134 unsigned offset_reg : 6; member
281 unsigned offset_reg : 6; member
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| D | disasm.c | 349 print_source_scalar(uniform->offset_reg, NULL, false, false); in print_uniform()
702 print_source_scalar(temp_write->temp_write.offset_reg, in print_temp_write()
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| D | codegen.c | 174 f->offset_reg = ppir_target_get_src_reg_index(&load->src); in ppir_codegen_encode_uniform()
565 f->temp_write.offset_reg = snode->index >> 2; in ppir_codegen_encode_store_temp()
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| /external/capstone/bindings/ocaml/ |
| D | m680x.ml | 10 offset_reg: int; RecordField
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| D | test_m680x.ml | 93 if idx.offset_reg != _M680X_REG_INVALID then
94 printf "\t\t\toffset register: %s\n" (cs_reg_name handle idx.offset_reg);
95 if idx.offset_bits != 0 && idx.offset_reg == 0 && idx.inc_dec == 0 then begin
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| D | ocaml.c | 635 Store_field(tmp3, 1, Val_int(insn[j-1].detail->m680x.operands[i].idx.offset_reg)); in _cs_disasm()
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| /external/capstone/arch/M680X/ |
| D | M680XInstPrinter.c | 178 if (op->idx.offset_reg != M680X_REG_INVALID) in printOperand()
179 printRegName(MI->csh, O, op->idx.offset_reg); in printOperand()
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| D | M680XDisassembler.c | 362 if (op->idx.offset_reg != M680X_REG_INVALID) in update_am_reg_list()
363 add_reg_to_rw_list(MI, op->idx.offset_reg, READ); in update_am_reg_list()
1208 op->idx.offset_reg = M680X_REG_INVALID; in add_indexed_operand()
1258 op->idx.offset_reg = M680X_REG_INVALID; in indexed09_hdlr()
1302 op->idx.offset_reg = M680X_REG_B; in indexed09_hdlr()
1307 op->idx.offset_reg = M680X_REG_A; in indexed09_hdlr()
1346 op->idx.offset_reg = M680X_REG_D; in indexed09_hdlr()
1393 op->idx.offset_reg = M680X_REG_INVALID; in indexed12_hdlr()
1445 op->idx.offset_reg = in indexed12_hdlr()
1450 op->idx.offset_reg = M680X_REG_D; in indexed12_hdlr()
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| /external/capstone/bindings/java/capstone/ |
| D | M680x.java | 18 public int offset_reg; field in M680x.OpIndexed
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| /external/llvm-project/lldb/source/Core/ |
| D | EmulateInstruction.cpp | 454 info.RegisterPlusIndirectOffset.offset_reg.name); in Dump()
467 info.RegisterToRegisterPlusIndirectOffset.offset_reg.name, in Dump()
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| /external/capstone/include/capstone/ |
| D | m680x.h | 84 m680x_reg offset_reg; ///< offset register (or M680X_REG_INVALID if member
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| /external/mesa3d/src/panfrost/midgard/ |
| D | midgard_emit.c | 558 unsigned offset_reg = SSA_REG_FROM_FIXED(ins->src[3]); in texture_word_from_instr() local
561 (offset_reg & 1) << 1 | /* select */ in texture_word_from_instr()
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| /external/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| D | EmulateInstructionARM.cpp | 5758 RegisterInfo offset_reg; in EmulateSTRHRegister() local
5759 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg); in EmulateSTRHRegister()
5772 RegisterInfo offset_reg; in EmulateSTRHRegister() local
5773 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg); in EmulateSTRHRegister()
5776 context.SetRegisterToRegisterPlusIndirectOffset(base_reg, offset_reg, in EmulateSTRHRegister()
7468 RegisterInfo offset_reg; in EmulateLDRHRegister() local
7470 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + m, offset_reg); in EmulateLDRHRegister()
7474 context.SetRegisterPlusIndirectOffset(base_reg, offset_reg); in EmulateLDRHRegister()
7492 context.SetRegisterPlusIndirectOffset(base_reg, offset_reg); in EmulateLDRHRegister()
7874 RegisterInfo offset_reg; in EmulateLDRSBRegister() local
[all …]
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_32.c | 1447 sljit_uw imm, offset_reg; in emit_op_mem() local
1468 offset_reg = OFFS_REG(arg); in emit_op_mem()
1473 FAIL_IF(push_inst(compiler, ADD | RD(tmp_reg) | RN(arg) | RM(offset_reg) | (argw << 7))); in emit_op_mem()
1479 RM(offset_reg) | (is_type1_transfer ? (1 << 25) : 0) | (argw << 7))); in emit_op_mem()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 1867 int offset_reg = ctx->gs_rotated_input[vtx_id / 3]; in fetch_gs_input() local
1874 if (offset_reg == ctx->gs_rotated_input[0] && offset_chan == 2) in fetch_gs_input()
1925 offset_reg = t2; in fetch_gs_input()
1946 offset_reg, offset_chan); in fetch_gs_input()
1949 offset_reg = t2; in fetch_gs_input()
1957 vtx.src_gpr = offset_reg; in fetch_gs_input()
3909 int offset_reg = i / 3; in r600_shader_from_tgsi() local
3914 if (offset_reg == 0 && offset_chan == 2) in r600_shader_from_tgsi()
3920 ctx.gs_rotated_input[offset_reg], offset_chan, in r600_shader_from_tgsi()
3922 offset_reg, offset_chan, in r600_shader_from_tgsi()
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