| /external/mesa3d/src/compiler/nir/ |
| D | nir_opt_uniform_atomics.c | 43 parse_atomic_op(nir_intrinsic_op op, unsigned *offset_src, unsigned *data_src) in parse_atomic_op() argument
48 *offset_src = 1; \ in parse_atomic_op()
54 *offset_src = 0; \ in parse_atomic_op()
62 *offset_src = 1; \ in parse_atomic_op()
209 unsigned offset_src, data_src; in optimize_atomic() local
210 nir_op op = parse_atomic_op(intrin->intrinsic, &offset_src, &data_src); in optimize_atomic()
295 unsigned offset_src, data_src; in opt_uniform_atomics() local
296 if (parse_atomic_op(intrin->intrinsic, &offset_src, &data_src) == nir_num_opcodes) in opt_uniform_atomics()
299 if (nir_src_is_divergent(intrin->src[offset_src])) in opt_uniform_atomics()
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| D | nir_gather_ssa_types.c | 209 nir_src *offset_src = nir_get_io_offset_src(intrin); in nir_gather_ssa_types() local
210 if (offset_src) { in nir_gather_ssa_types()
211 assert(offset_src->is_ssa); in nir_gather_ssa_types()
212 set_type(offset_src->ssa->index, nir_type_int, in nir_gather_ssa_types()
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| D | nir_lower_wrmasks.c | 78 offset_src(nir_intrinsic_op intrinsic) in offset_src() function
105 unsigned offset_idx = offset_src(intr->intrinsic); in split_wrmask()
209 assert(offset_src(intr->intrinsic) >= 0); in nir_lower_wrmasks_instr()
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| D | nir_lower_ssbo.c | 115 nir_src *offset_src = nir_get_io_offset_src(intr); in lower_ssbo_instr() local
116 nir_ssa_def *offset = nir_ssa_for_src(b, *offset_src, 1); in lower_ssbo_instr()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_nir_lower_mem_access_bit_sizes.c | 97 nir_src *offset_src = nir_get_io_offset_src(intrin); in lower_mem_load_bit_size() local
98 if (bit_size < 32 && !needs_scalar && nir_src_is_const(*offset_src)) { in lower_mem_load_bit_size()
102 const int load_offset = nir_src_as_uint(*offset_src) % 4; in lower_mem_load_bit_size()
180 nir_src *offset_src = nir_get_io_offset_src(intrin); in lower_mem_store_bit_size() local
181 const bool offset_is_const = nir_src_is_const(*offset_src); in lower_mem_store_bit_size()
183 offset_is_const ? nir_src_as_uint(*offset_src) : 0; in lower_mem_store_bit_size()
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| D | brw_fs_nir.cpp | 2411 const nir_src &offset_src, in emit_gs_input_load() argument
2421 nir_src_is_const(offset_src) && nir_src_is_const(vertex_src) && in emit_gs_input_load()
2422 4 * (base_offset + nir_src_as_uint(offset_src)) < push_reg_count) { in emit_gs_input_load()
2423 int imm_offset = (base_offset + nir_src_as_uint(offset_src)) * 4 + in emit_gs_input_load()
2514 fs_reg indirect_offset = get_nir_src(offset_src); in emit_gs_input_load()
2516 if (nir_src_is_const(offset_src)) { in emit_gs_input_load()
2533 inst->offset = base_offset + nir_src_as_uint(offset_src); in emit_gs_input_load()
2564 nir_src *offset_src = nir_get_io_offset_src(instr); in get_indirect_offset() local
2566 if (nir_src_is_const(*offset_src)) { in get_indirect_offset()
2571 assert(nir_src_as_uint(*offset_src) == 0); in get_indirect_offset()
[all …]
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| D | brw_vec4_nir.cpp | 268 nir_src *offset_src = nir_get_io_offset_src(instr); in get_indirect_offset() local
270 if (nir_src_is_const(*offset_src)) { in get_indirect_offset()
275 assert(nir_src_as_uint(*offset_src) == 0); in get_indirect_offset()
279 return get_nir_src(*offset_src, BRW_REGISTER_TYPE_UD, 1); in get_indirect_offset()
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| D | brw_fs.h | 315 unsigned base_offset, const nir_src &offset_src,
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| /external/mesa3d/src/broadcom/compiler/ |
| D | v3d_nir_lower_robust_buffer_access.c | 31 uint32_t offset_src, in rewrite_offset() argument
49 nir_umin(b, instr->src[offset_src].ssa, aligned_buffer_size); in rewrite_offset()
50 nir_instr_rewrite_src(&instr->instr, &instr->src[offset_src], in rewrite_offset()
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| D | nir_to_vir.c | 240 int offset_src; in ntq_emit_tmu_general() local
242 offset_src = 0; in ntq_emit_tmu_general()
248 offset_src = 0 + has_index; in ntq_emit_tmu_general()
250 offset_src = 1 + has_index; in ntq_emit_tmu_general()
252 offset_src = 0 + has_index; in ntq_emit_tmu_general()
255 bool dynamic_src = !nir_src_is_const(instr->src[offset_src]); in ntq_emit_tmu_general()
258 const_offset = nir_src_as_uint(instr->src[offset_src]); in ntq_emit_tmu_general()
400 ntq_get_src(c, instr->src[offset_src], 0); in ntq_emit_tmu_general()
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 2421 int offset_src = -1; in nir_to_tgsi_lower_64bit_intrinsic() local
2427 offset_src = 1; in nir_to_tgsi_lower_64bit_intrinsic()
2430 offset_src = 1; in nir_to_tgsi_lower_64bit_intrinsic()
2434 offset_src = 2; in nir_to_tgsi_lower_64bit_intrinsic()
2439 if (offset_src != -1) { in nir_to_tgsi_lower_64bit_intrinsic()
2442 nir_iadd_imm(b, second->src[offset_src].ssa, offset_amount); in nir_to_tgsi_lower_64bit_intrinsic()
2443 nir_instr_rewrite_src(&second->instr, &second->src[offset_src], in nir_to_tgsi_lower_64bit_intrinsic()
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| /external/crosvm/fuse/src/ |
| D | filesystem.rs | 1151 offset_src: u64, in copy_file_range()
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| /external/mesa3d/src/compiler/nir/tests/ |
| D | load_store_vectorizer_tests.cpp | 236 int offset_src = res ? 1 : 0; in create_indirect_load() local
238 if (nir_src_is_const(load->src[offset_src])) { in create_indirect_load()
239 nir_intrinsic_set_range_base(load, nir_src_as_uint(load->src[offset_src])); in create_indirect_load()
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| /external/crosvm/devices/src/virtio/fs/ |
| D | passthrough.rs | 2114 offset_src: u64, in copy_file_range()
2141 &offset_src, in copy_file_range()
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| /external/mesa3d/src/amd/llvm/ |
| D | ac_nir_to_llvm.c | 3780 LLVMValueRef offset_src = ac_extract_components(&ctx->ac, src, start, count); in visit_intrinsic() local
3781 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr); in visit_intrinsic()
4063 unsigned offset_src = 0; in visit_tex() local
4086 offset_src = i; in visit_tex()
4306 int num_offsets = instr->src[offset_src].src.ssa->num_components; in visit_tex()
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| /external/python/cpython3/Modules/clinic/ |
| D | posixmodule.c.h | 5944 PyObject *offset_src, PyObject *offset_dst);
5957 PyObject *offset_src = Py_None; in os_copy_file_range() local
6003 offset_src = args[3]; in os_copy_file_range()
6010 return_value = os_copy_file_range_impl(module, src, dst, count, offset_src, offset_dst); in os_copy_file_range()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_vgpu10.c | 8038 struct tgsi_full_src_register offset_src, sampler, ref; in emit_tg4() local
8117 offset_src = make_src_reg(inst->TexOffsets[0].File, in emit_tg4()
8119 offset_src = swizzle_src(&offset_src, inst->TexOffsets[0].SwizzleX, in emit_tg4()
8123 emit_src_register(emit, &offset_src); in emit_tg4()
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| /external/python/cpython3/Modules/ |
| D | posixmodule.c | 10317 PyObject *offset_src, PyObject *offset_dst) in os_copy_file_range_impl() argument
10335 if (offset_src != Py_None) { in os_copy_file_range_impl()
10336 if (!Py_off_t_converter(offset_src, &offset_src_val)) { in os_copy_file_range_impl()
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| /external/python/cpython3/Doc/library/ |
| D | os.rst | 718 .. function:: copy_file_range(src, dst, count, offset_src=None, offset_dst=None)
721 *offset_src*, to file descriptor *dst*, starting from offset *offset_dst*.
722 If *offset_src* is None, then *src* is read from the current position;
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| /external/python/cpython3/Lib/test/ |
| D | test_os.py | 353 offset_src=in_skip,
|