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Searched refs:omod (Results 1 – 25 of 80) sorted by relevance

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/external/llvm-project/llvm/test/TableGen/
DDefaultOpsGlobalISel.td30 def omod : OperandWithDefaultOps <i32, (ops (i32 0))>;
49 …$src0, omod:{ *:[i32] }:$omod, i1:{ *:[i1] }:$clamp)) => (FLOMP:{ *:[f32] } f32:{ *:[f32] }:$src…
54 // CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // omod
69 …:{ *:[f32] }:$src0, i32:{ *:[i32] }:$omod)) => (FLAMP:{ *:[f32] } FPR32:{ *:[f32] }:$src0, omod:…
73 // CHECK-NEXT: GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // omod
150 (outs FPR32:$dst), (ins FPR32:$src0, clamp:$clamp, omod:$omod),
151 [(set FPR32:$dst, (ffloor (SelectClampOMod f32:$src0, omod:$omod, i1:$clamp)))]>;
153 def FLAMP : I<(outs FPR32:$dst), (ins FPR32:$src0, omod:$omod, clamp:$clamp), []>;
157 (fcos (SelectOMod f32:$src0, i32:$omod)),
158 (FLAMP FPR32:$src0, omod:$omod)
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Domod.ll95 ; Clamp is applied after omod, folding both into instruction is OK.
108 ; Cannot fold omod into clamp
187 ; Don't fold omod into omod into another omod.
199 ; Don't fold omod if denorms enabled
210 ; Don't fold omod if denorms enabled for add form.
221 ; Don't fold omod if denorms enabled
232 ; Don't fold omod if denorms enabled for add form.
Dclamp-omod-special-case.mir127 # Don't fold a mul that looks like an omod if itself has omod set
191 # Don't fold a mul that looks like an omod if itself has clamp set
269 # Don't fold a mul that looks like an omod if itself has omod set
333 # Don't fold a mul that looks like an omod if itself has clamp set
Domod-nsz-flag.mir5 # FIXME: Is it OK to fold omod for this?
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst785 …u_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
786 …u_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
801 …` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
802 …` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1001 …` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1002 …ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1003 …ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1004 …ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1005 …ref:`m<amdgpu_synid7_mod>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1007 … :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
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DAMDGPUAsmGFX9.rst866 …d9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
874 …d9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
877 …d9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
886 …d9_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
890 …pu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
893 …pu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
896 …pu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
899 …pu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
902 …pu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
905 …pu_synid9_mod_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
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DAMDGPUAsmGFX10.rst779 …10_mod_dpp_sdwa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
785 …wa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
912 …wa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
913 …wa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
916 …wa_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
917 …_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
918 …_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
919 …_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
920 …_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
921 …_sdwa_sext>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`…
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DAMDGPUAsmGFX8.rst1033 …vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1034 …vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1051 … :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1052 … :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1254 … :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1255 …_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1256 …_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1257 …_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1258 …_synid8_mod_vop3_abs_neg>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
1259 … :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
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/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_expr.cpp337 if (bc.omod) in apply_alu_dst_mod()
338 v = v.f * omod_coeff[bc.omod - 1]; in apply_alu_dst_mod()
369 if (b0.clamp != b1.clamp || b0.omod != b1.omod) in ops_equal()
403 if (!sd->bc.clamp && !sd->bc.omod && !sd->bc.src[0].abs && in fold_alu_op1()
413 && n.bc.clamp == 0 && n.bc.omod == 0 in fold_alu_op1()
494 !n->bc.src[1].abs && !n->bc.src[0].abs && !d0->bc.omod && in fold_mul_add()
495 !d0->bc.clamp && !n->bc.omod && in fold_mul_add()
531 !n->bc.src[0].abs && !n->bc.src[1].abs && !d1->bc.omod && in fold_mul_add()
532 !d1->bc.clamp && !n->bc.omod && in fold_mul_add()
661 !d0->bc.omod && !d0->bc.clamp && in fold_assoc()
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Dsb_dump.cpp416 if (n->bc.omod) { in dump_alu()
418 sblog << omod_str[n->bc.omod]; in dump_alu()
Dsb_bc_builder.cpp432 .OMOD(bc.omod) in build_alu()
449 .OMOD(bc.omod) in build_alu()
463 .EXECUTE_MASK_OP(bc.omod) in build_alu()
478 .OMOD(bc.omod) in build_alu()
/external/llvm/lib/Target/AMDGPU/
DVIInstrFormats.td123 bits<2> omod;
134 let Inst{60-59} = omod;
163 bits<2> omod;
174 let Inst{60-59} = omod;
DR600InstrFormats.td128 bits<2> omod;
135 let Word1{6-5} = omod;
190 let Inst{39-38} = omod;
198 let Inst{38-37} = omod;
DSIInstrInfo.td547 def omod : NamedOperandU32<"OModSI", NamedMatchClass<"OModSI">>;
1209 clampmod:$clamp, omod:$omod)
1219 clampmod:$clamp, omod:$omod)
1230 clampmod:$clamp, omod:$omod)
1351 dst#", "#src0#src1#src2#"$clamp"#"$omod");
1545 let Asm64 = "$vdst, $sdst, $src0_modifiers, $src1_modifiers, $src2_modifiers"#"$clamp"#"$omod";
1847 bits<2> omod = !if(HasModifiers, ?, 0);
1860 bits<2> omod = !if(HasOutputMods, ?, 0);
2115 i32:$src0_modifiers, i1:$clamp, i32:$omod))))],
2127 i32:$src0_modifiers, i1:$clamp, i32:$omod))))],
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DSIInstrFormats.td406 bits<2> omod;
417 let Inst{60-59} = omod;
446 bits<2> omod;
455 let Inst{60-59} = omod;
/external/mesa3d/src/amd/compiler/
Daco_optimizer.cpp1338 vop3->omod != 0 || vop3->opsel != 0) in label_instruction()
1771 new_vop3->omod = cmp_vop3->omod; in combine_comparison_ordering()
1890 new_vop3->omod = cmp_vop3->omod; in combine_constant_comparison_ordering()
1939 new_vop3->omod = cmp_vop3->omod; in combine_inverse_comparison()
1952 new_sdwa->omod = cmp_sdwa->omod; in combine_inverse_comparison()
1995 if (op2_vop3 && (op2_vop3->clamp || op2_vop3->omod)) in match_op3_for_vop3()
2000 *op1_omod = op1_vop3 ? op1_vop3->omod : 0u; in match_op3_for_vop3()
2048 bool clamp, unsigned omod) in create_vop3_for_op3() argument
2054 new_instr->omod = omod; in create_vop3_for_op3()
2073 uint8_t opsel = 0, omod = 0; in combine_three_valu_op() local
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Daco_ir.cpp176 if (vop3->omod && chip < GFX9) in can_use_SDWA()
239 sdwa->omod = vop3->omod; in convert_to_SDWA()
Daco_opt_value_numbering.cpp189 a3->omod == b3->omod && in operator ()()
217 aSDWA->omod == bSDWA->omod; in operator ()()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DVOP3Instructions.td15 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),
144 let Asm64 = " $vdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$omod" in {
232 clampmod:$clamp, omod:$omod);
234 let Asm64 = "$vdst, $src0_modifiers, $attr$attrchan$clamp$omod";
240 clampmod:$clamp, omod:$omod);
242 let Asm64 = "$vdst, $src0, $attr$attrchan$clamp$omod";
249 string omod = !if(HasOMod, "$omod", "");
251 " $vdst, $src0_modifiers, $attr$attrchan"#src2#"$high$clamp"#omod;
261 highmod:$high, clampmod0:$clamp, omod0:$omod),
269 highmod:$high, clampmod0:$clamp, omod0:$omod)
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DR600InstrFormats.td137 bits<2> omod;
144 let Word1{6-5} = omod;
199 let Inst{39-38} = omod;
207 let Inst{38-37} = omod;
DVOPInstructions.td176 bits<2> omod;
186 let Inst{60-59} = !if(P.HasOMod, omod, 0);
280 bits<2> omod;
288 let Inst{60-59} = !if(P.HasOMod, omod, 0);
457 bits<2> omod;
462 let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0);
/external/mesa3d/src/gallium/drivers/r600/
Dr700_asm.c71 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) | in r700_bytecode_alu_build()
120 alu->omod = G_SQ_ALU_WORD1_OP2_OMOD(word1); in r700_bytecode_alu_read()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DR600InstrFormats.td137 bits<2> omod;
144 let Word1{6-5} = omod;
199 let Inst{39-38} = omod;
207 let Inst{38-37} = omod;
DVOP3Instructions.td15 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),
148 let Asm64 = " $vdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$omod" in {
197 let Asm64 = " $vdst, $sdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$omod";
233 clampmod0:$clamp, omod0:$omod);
235 let Asm64 = "$vdst, $src0_modifiers, $attr$attrchan$clamp$omod";
241 clampmod0:$clamp, omod0:$omod);
243 let Asm64 = "$vdst, $src0, $attr$attrchan$clamp$omod";
250 string omod = !if(HasOMod, "$omod", "");
252 " $vdst, $src0_modifiers, $attr$attrchan"#src2#"$high$clamp"#omod;
262 highmod:$high, clampmod0:$clamp, omod0:$omod),
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DVOPInstructions.td182 bits<2> omod;
192 let Inst{60-59} = !if(P.HasOMod, omod, 0);
286 bits<2> omod;
294 let Inst{60-59} = !if(P.HasOMod, omod, 0);
463 bits<2> omod;
468 let Inst{47-46} = !if(P.HasSDWAOMod, omod{1-0}, 0);

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