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/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.td717 class SOP1_Pseudo <string opName, dag outs, dag ins, list<dag> pattern> :
719 SIMCInstr<opName, SIEncodingFamily.NONE> {
724 class SOP1_Real_si <sop1 op, string opName, dag outs, dag ins, string asm> :
727 SIMCInstr<opName, SIEncodingFamily.SI> {
734 class SOP1_Real_vi <sop1 op, string opName, dag outs, dag ins, string asm> :
737 SIMCInstr<opName, SIEncodingFamily.VI> {
744 multiclass SOP1_m <sop1 op, string opName, dag outs, dag ins, string asm,
747 def "" : SOP1_Pseudo <opName, outs, ins, pattern>;
749 def _si : SOP1_Real_si <op, opName, outs, ins, asm>;
751 def _vi : SOP1_Real_vi <op, opName, outs, ins, asm>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DVOP2Instructions.td62 class VOP2_Pseudo <string opName, VOPProfile P, list<dag> pattern=[], string suffix = "_e32"> :
63 VOP_Pseudo <opName, suffix, P, P.Outs32, P.Ins32, "", pattern> {
122 multiclass VOP2Inst_e32<string opName,
125 string revOp = opName,
128 def _e32 : VOP2_Pseudo <opName, P, VOPPatOrNull<node,P>.ret>,
129 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>;
133 multiclass VOP2Inst_e64<string opName,
136 string revOp = opName,
139 def _e64 : VOP3_Pseudo <opName, P, getVOP2Pat64<node, P>.ret>,
140 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>;
[all …]
DDSInstructions.td9 class DS_Pseudo <string opName, dag outs, dag ins, string asmOps, list<dag> pattern=[]> :
11 SIMCInstr <opName, SIEncodingFamily.NONE> {
31 string Mnemonic = opName;
86 class DS_0A1D_NORET<string opName, RegisterClass rc = VGPR_32>
87 : DS_Pseudo<opName,
97 class DS_1A1D_NORET<string opName, RegisterClass rc = VGPR_32>
98 : DS_Pseudo<opName,
107 multiclass DS_1A1D_NORET_mc<string opName, RegisterClass rc = VGPR_32> {
108 def "" : DS_1A1D_NORET<opName, rc>,
109 AtomicNoRet<opName, 0>;
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DVOPCInstructions.td77 class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[],
80 VOP <opName>,
81 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> {
87 string Mnemonic = opName;
203 multiclass VOPC_Pseudos <string opName,
206 string revOp = opName,
209 def _e32 : VOPC_Pseudo <opName, P>,
210 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>,
211 VCMPXNoSDstTable<1, opName#"_e32"> {
219 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>,
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DSOPInstructions.td22 class SOP_Pseudo<string opName, dag outs, dag ins, string asmOps,
25 SIMCInstr<opName, SIEncodingFamily.NONE> {
30 string Mnemonic = opName;
40 class SOP1_Pseudo <string opName, dag outs, dag ins,
42 SOP_Pseudo<opName, outs, ins, asmOps, pattern> {
80 class SOP1_32 <string opName, list<dag> pattern=[], bit tied_in = 0> : SOP1_Pseudo <
81 opName, (outs SReg_32:$sdst),
89 class SOP1_32R <string opName, list<dag> pattern=[]> : SOP1_Pseudo <
90 opName, (outs SReg_32:$sdst), (ins SReg_32:$src0),
94 class SOP1_0_32 <string opName, list<dag> pattern = []> : SOP1_Pseudo <
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DFLATInstructions.td19 class FLAT_Pseudo<string opName, dag outs, dag ins,
22 SIMCInstr<opName, SIEncodingFamily.NONE> {
33 string Mnemonic = opName;
136 class FLAT_Load_Pseudo <string opName, RegisterClass regClass,
139 opName,
152 let PseudoInstr = opName#!if(!and(HasSaddr, EnableSaddr), "_SADDR", "");
159 class FLAT_Store_Pseudo <string opName, RegisterClass vdataClass,
161 opName,
173 let PseudoInstr = opName#!if(!and(HasSaddr, EnableSaddr), "_SADDR", "");
177 multiclass FLAT_Global_Load_Pseudo<string opName, RegisterClass regClass, bit HasTiedInput = 0> {
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DSMInstructions.td23 class SM_Pseudo <string opName, dag outs, dag ins, string asmOps, list<dag> pattern=[]> :
25 SIMCInstr<opName, SIEncodingFamily.NONE> {
37 string Mnemonic = opName;
65 class SM_Probe_Pseudo <string opName, dag ins, bit isImm>
66 : SM_Pseudo<opName, (outs), ins, " $sdata, $sbase, $offset"> {
74 let PseudoInstr = opName # !if(isImm, "_IMM", "_SGPR");
77 class SM_Load_Pseudo <string opName, dag outs, dag ins, string asmOps, list<dag> pattern=[]>
78 : SM_Pseudo<opName, outs, ins, asmOps, pattern> {
86 class SM_Store_Pseudo <string opName, dag ins, string asmOps, list<dag> pattern = []>
87 : SM_Pseudo<opName, (outs), ins, asmOps, pattern> {
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DBUFInstructions.td68 class MTBUF_Pseudo <string opName, dag outs, dag ins,
71 SIMCInstr<opName, SIEncodingFamily.NONE> {
78 string Mnemonic = opName;
196 class MTBUF_Load_Pseudo <string opName,
203 : MTBUF_Pseudo<opName,
209 let PseudoInstr = opName # "_" # getAddrName<addrKindCopy>.ret;
215 multiclass MTBUF_Pseudo_Loads<string opName, RegisterClass vdataClass,
219 def _OFFSET : MTBUF_Load_Pseudo <opName, BUFAddrKind.Offset, vdataClass, elems,
225 def _ADDR64 : MTBUF_Load_Pseudo <opName, BUFAddrKind.Addr64, vdataClass, elems,
231 def _OFFEN : MTBUF_Load_Pseudo <opName, BUFAddrKind.OffEn, vdataClass, elems>;
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/external/llvm-project/llvm/lib/Target/AMDGPU/
DVOP2Instructions.td62 class VOP2_Pseudo <string opName, VOPProfile P, list<dag> pattern=[], string suffix = "_e32"> :
63 VOP_Pseudo <opName, suffix, P, P.Outs32, P.Ins32, "", pattern> {
127 multiclass VOP2Inst_e32<string opName,
130 string revOp = opName,
133 def _e32 : VOP2_Pseudo <opName, P, VOPPatOrNull<node,P>.ret>,
134 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>;
138 multiclass VOP2Inst_e64<string opName,
141 string revOp = opName,
144 def _e64 : VOP3_Pseudo <opName, P, getVOP2Pat64<node, P>.ret>,
145 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>;
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DDSInstructions.td9 class DS_Pseudo <string opName, dag outs, dag ins, string asmOps, list<dag> pattern=[]> :
11 SIMCInstr <opName, SIEncodingFamily.NONE> {
31 string Mnemonic = opName;
86 class DS_0A1D_NORET<string opName, RegisterClass rc = VGPR_32>
87 : DS_Pseudo<opName,
97 class DS_1A1D_NORET<string opName, RegisterClass rc = VGPR_32>
98 : DS_Pseudo<opName,
107 multiclass DS_1A1D_NORET_mc<string opName, RegisterClass rc = VGPR_32> {
108 def "" : DS_1A1D_NORET<opName, rc>,
109 AtomicNoRet<opName, 0>;
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DVOPCInstructions.td77 class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[],
80 VOP <opName>,
81 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> {
87 string Mnemonic = opName;
205 multiclass VOPC_Pseudos <string opName,
208 string revOp = opName,
211 def _e32 : VOPC_Pseudo <opName, P>,
212 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>,
213 VCMPXNoSDstTable<1, opName#"_e32"> {
221 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>,
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DSOPInstructions.td22 class SOP_Pseudo<string opName, dag outs, dag ins, string asmOps,
25 SIMCInstr<opName, SIEncodingFamily.NONE> {
30 string Mnemonic = opName;
40 class SOP1_Pseudo <string opName, dag outs, dag ins,
42 SOP_Pseudo<opName, outs, ins, asmOps, pattern> {
80 class SOP1_32 <string opName, list<dag> pattern=[], bit tied_in = 0> : SOP1_Pseudo <
81 opName, (outs SReg_32:$sdst),
89 class SOP1_32R <string opName, list<dag> pattern=[]> : SOP1_Pseudo <
90 opName, (outs SReg_32:$sdst), (ins SReg_32:$src0),
94 class SOP1_0_32 <string opName, list<dag> pattern = []> : SOP1_Pseudo <
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DFLATInstructions.td20 class FLAT_Pseudo<string opName, dag outs, dag ins,
23 SIMCInstr<opName, SIEncodingFamily.NONE> {
34 string Mnemonic = opName;
140 class FLAT_Load_Pseudo <string opName, RegisterClass regClass,
143 opName,
159 let PseudoInstr = opName#!if(!and(HasSaddr, EnableSaddr), "_SADDR", "");
166 class FLAT_Store_Pseudo <string opName, RegisterClass vdataClass,
168 opName,
181 let PseudoInstr = opName#!if(!and(HasSaddr, EnableSaddr), "_SADDR", "");
185 multiclass FLAT_Global_Load_Pseudo<string opName, RegisterClass regClass, bit HasTiedInput = 0> {
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DSMInstructions.td25 class SM_Pseudo <string opName, dag outs, dag ins, string asmOps, list<dag> pattern=[]> :
27 SIMCInstr<opName, SIEncodingFamily.NONE> {
39 string Mnemonic = opName;
74 class SM_Probe_Pseudo <string opName, dag ins, bit isImm>
75 : SM_Pseudo<opName, (outs), ins, " $sdata, $sbase, $offset"> {
83 let PseudoInstr = opName # !if(isImm, "_IMM", "_SGPR");
86 class SM_Load_Pseudo <string opName, dag outs, dag ins, string asmOps, list<dag> pattern=[]>
87 : SM_Pseudo<opName, outs, ins, asmOps, pattern> {
95 class SM_Store_Pseudo <string opName, dag ins, string asmOps, list<dag> pattern = []>
96 : SM_Pseudo<opName, (outs), ins, asmOps, pattern> {
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DBUFInstructions.td68 class MTBUF_Pseudo <string opName, dag outs, dag ins,
71 SIMCInstr<opName, SIEncodingFamily.NONE> {
78 string Mnemonic = opName;
197 class MTBUF_Load_Pseudo <string opName,
204 : MTBUF_Pseudo<opName,
210 let PseudoInstr = opName # "_" # getAddrName<addrKindCopy>.ret;
216 multiclass MTBUF_Pseudo_Loads<string opName, RegisterClass vdataClass,
220 def _OFFSET : MTBUF_Load_Pseudo <opName, BUFAddrKind.Offset, vdataClass, elems,
226 def _ADDR64 : MTBUF_Load_Pseudo <opName, BUFAddrKind.Addr64, vdataClass, elems,
232 def _OFFEN : MTBUF_Load_Pseudo <opName, BUFAddrKind.OffEn, vdataClass, elems>;
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/external/tensorflow/tensorflow/java/src/main/java/org/tensorflow/op/
DNameScope.java42 String actualName = (opName != null) ? opName : scopeName; in withSubScope()
56 String actualName = (opName != null) ? opName : name; in makeOpName()
70 private NameScope(String opPrefix, String opName, Map<String, Integer> ids) { in NameScope() argument
72 this.opName = opName; in NameScope()
116 private final String opName; field in NameScope
/external/llvm-project/mlir/lib/Transforms/
DOpStats.cpp51 auto splitOperationName = [](StringRef opName) { in printSummary() argument
52 auto splitName = opName.split('.'); in printSummary()
58 StringRef dialectName, opName; in printSummary() local
61 std::tie(dialectName, opName) = splitOperationName(key); in printSummary()
63 maxLenOpName = std::max(maxLenOpName, opName.size()); in printSummary()
67 std::tie(dialectName, opName) = splitOperationName(key); in printSummary()
78 os << llvm::left_justify(opName, maxLenOpName) << " , " << opCount[key] in printSummary()
/external/tensorflow/tensorflow/java/src/main/java/org/tensorflow/
DSession.java381 private GraphOperation operationByName(String opName) { in operationByName() argument
382 GraphOperation op = graph.operation(opName); in operationByName()
384 throw new IllegalArgumentException("No Operation named [" + opName + "] in the Graph"); in operationByName()
390 private Output<?> parseOutput(String opName) { in parseOutput() argument
391 int colon = opName.lastIndexOf(':'); in parseOutput()
392 if (colon == -1 || colon == opName.length() - 1) { in parseOutput()
393 return new Output(operationByName(opName), 0); in parseOutput()
396 String op = opName.substring(0, colon); in parseOutput()
397 int index = Integer.parseInt(opName.substring(colon + 1)); in parseOutput()
400 return new Output(operationByName(opName), 0); in parseOutput()
/external/llvm-project/mlir/tools/mlir-tblgen/
DRewriterGen.cpp66 void emitMatchLogic(DagNode tree, StringRef opName);
83 void emitOpMatch(DagNode tree, StringRef opName, int depth);
87 void emitOperandMatch(DagNode tree, StringRef opName, int argIndex,
92 void emitAttributeMatch(DagNode tree, StringRef opName, int argIndex,
97 void emitMatchCheck(StringRef opName, const FmtObjectBase &matchFmt,
102 void emitMatchCheck(StringRef opName, const std::string &matchStr,
245 void PatternEmitter::emitNativeCodeMatch(DagNode tree, StringRef opName, in emitNativeCodeMatch() argument
262 os << "if(!" << opName << ") return failure();\n"; in emitNativeCodeMatch()
285 fmt, &fmtCtx.addSubst("_loc", locToUse), opName, capture[0], capture[1], in emitNativeCodeMatch()
313 opName, in emitNativeCodeMatch()
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/external/llvm-project/mlir/lib/Dialect/OpenMP/IR/
DOpenMPDialect.cpp228 const llvm::StringRef opName = result.name.getStringRef(); in parseParallelOp() local
234 return allowedOnce(parser, "if", opName); in parseParallelOp()
242 return allowedOnce(parser, "num_threads", opName); in parseParallelOp()
250 return allowedOnce(parser, "private", opName); in parseParallelOp()
257 return allowedOnce(parser, "firstprivate", opName); in parseParallelOp()
264 return allowedOnce(parser, "shared", opName); in parseParallelOp()
271 return allowedOnce(parser, "copyin", opName); in parseParallelOp()
278 return allowedOnce(parser, "allocate", opName); in parseParallelOp()
287 return allowedOnce(parser, "default", opName); in parseParallelOp()
303 return allowedOnce(parser, "proc_bind", opName); in parseParallelOp()
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/external/llvm-project/mlir/lib/Dialect/GPU/Transforms/
DAllReduceLowering.cpp210 AccumulatorFactory getFactory(StringRef opName) { in getFactory()
212 if (opName == "add") in getFactory()
214 if (opName == "mul") in getFactory()
216 if (opName == "and") { in getFactory()
219 if (opName == "or") { in getFactory()
222 if (opName == "xor") { in getFactory()
225 if (opName == "max") { in getFactory()
230 if (opName == "min") { in getFactory()
/external/llvm-project/mlir/test/lib/Dialect/SPIRV/
DTestAvailability.cpp39 auto opName = op->getName(); in runOnFunction() local
43 os << opName << " min version: " in runOnFunction()
47 os << opName << " max version: " in runOnFunction()
51 os << opName << " extensions: ["; in runOnFunction()
63 os << opName << " capabilities: ["; in runOnFunction()
/external/llvm-project/mlir/test/lib/Transforms/
DTestDynamicPipeline.cpp51 auto opName = symbolOp.getName(); in runOnOperation() local
52 if (!opNames.empty() && !llvm::is_contained(opNames, opName)) { in runOnOperation()
53 llvm::errs() << "dynamic-pipeline skip op name: " << opName << "\n"; in runOnOperation()
/external/llvm-project/mlir/include/mlir/Pass/
DPass.h87 Optional<StringRef> getOpName() const { return opName; } in getOpName()
150 explicit Pass(TypeID passID, Optional<StringRef> opName = llvm::None)
151 : passID(passID), opName(opName) {} in passID()
152 Pass(const Pass &other) : Pass(other.passID, other.opName) {} in Pass()
278 Optional<StringRef> opName; variable
/external/llvm-project/mlir/lib/Dialect/Linalg/Transforms/
DTransforms.cpp109 StringRef opName, MLIRContext *context, LinalgTilingOptions options, in LinalgBaseTilingPattern() argument
111 : RewritePattern(opName, {}, benefit, context), marker(marker), in LinalgBaseTilingPattern()
153 StringRef opName, MLIRContext *context, in LinalgBaseTileAndFusePattern() argument
158 : RewritePattern(opName, {}, benefit, context), in LinalgBaseTileAndFusePattern()
243 StringRef opName, MLIRContext *context, in LinalgBaseInterchangePattern() argument
246 : RewritePattern(opName, {}, benefit, context), marker(marker), in LinalgBaseInterchangePattern()
270 StringRef opName, MLIRContext *context, LinalgPromotionOptions options, in LinalgBasePromotionPattern() argument
272 : RewritePattern(opName, {}, benefit, context), marker(marker), in LinalgBasePromotionPattern()
298 StringRef opName, MLIRContext *context, LinalgMarker marker, in LinalgBaseVectorizationPattern() argument
300 : RewritePattern(opName, {}, benefit, context), marker(marker) {} in LinalgBaseVectorizationPattern()

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