Home
last modified time | relevance | path

Searched refs:opstr (Results 1 – 25 of 57) sorted by relevance

123

/external/llvm-project/llvm/lib/Target/Mips/
DMicroMipsDSPInstrFormats.td9 class MMDSPInst<string opstr = "">
13 string BaseOpcode = opstr;
24 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
36 class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
47 class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
60 class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
73 class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
85 class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
98 class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
111 class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
[all …]
DMicroMipsInstrInfo.td198 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
201 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
209 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
212 !strconcat(opstr, "\t$rt, $addr"),
217 let BaseOpcode = opstr;
222 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
225 !strconcat(opstr, "\t$rt, $addr"),
228 let BaseOpcode = opstr;
233 class MovePMM16<string opstr, RegisterOperand RO1, RegisterOperand RO2,
236 !strconcat(opstr, "\t$rd1, $rd2, $rs, $rt"), [],
[all …]
DMipsInstrInfo.td1313 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1317 !strconcat(opstr, "\t$rd, $rs, $rt"),
1318 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1325 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1330 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1332 Itin, FrmI, opstr> {
1338 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
1340 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
1347 class LogicNOR<string opstr, RegisterOperand RO>:
1349 !strconcat(opstr, "\t$rd, $rs, $rt"),
[all …]
DMipsInstrFPU.td111 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
114 !strconcat(opstr, "\t$fd, $fs, $ft"),
115 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
120 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
122 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
123 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
128 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
130 InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"),
131 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
135 class CVT_PS_S_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
[all …]
DMicroMips32r6InstrInfo.td457 class JALRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
458 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
460 MMR6Arch<opstr> {
468 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
471 : MMR6Arch<opstr> {
473 string AsmString = !strconcat(opstr, "\t$rt, $offset");
492 class JRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
493 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
495 MMR6Arch<opstr> {
606 class DIVMOD_MMR6_DESC_BASE<string opstr, RegisterOperand GPROpnd,
[all …]
DMipsCondMov.td18 class CMov_I_I_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
21 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
26 class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
29 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
35 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
38 !strconcat(opstr, "\t$rd, $rs, $fcc"),
40 Itin, FrmFR, opstr>, HARDFLOAT {
45 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
48 !strconcat(opstr, "\t$fd, $fs, $fcc"),
50 Itin, FrmFR, opstr>, HARDFLOAT {
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrFormats.td10 class MMDSPInst<string opstr = "">
14 string BaseOpcode = opstr;
25 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
37 class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
48 class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
61 class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
74 class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
86 class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
99 class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
112 class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
[all …]
DMicroMipsInstrInfo.td185 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
188 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
196 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
199 !strconcat(opstr, "\t$rt, $addr"),
206 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
209 !strconcat(opstr, "\t$rt, $addr"),
229 class MovePMM16<string opstr, RegisterOperand RO> :
231 !strconcat(opstr, "\t$dst_regs, $rs, $rt"), [],
251 class StorePairMM<string opstr, InstrItinClass Itin = NoItinerary,
254 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
[all …]
DMipsInstrFPU.td104 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
107 !strconcat(opstr, "\t$fd, $fs, $ft"),
108 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
113 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
115 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
116 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
121 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
123 InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"),
124 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
128 multiclass ABSS_M<string opstr, InstrItinClass Itin,
[all …]
DMipsInstrInfo.td1096 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1100 !strconcat(opstr, "\t$rd, $rs, $rt"),
1101 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1108 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1113 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1115 Itin, FrmI, opstr> {
1121 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
1123 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
1130 class LogicNOR<string opstr, RegisterOperand RO>:
1132 !strconcat(opstr, "\t$rd, $rs, $rt"),
[all …]
DMicroMips32r6InstrInfo.td454 class JALRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
455 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
457 MMR6Arch<opstr>, MicroMipsR6Inst16 {
464 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
466 : MMR6Arch<opstr> {
468 string AsmString = !strconcat(opstr, "\t$rt, $offset");
486 class JRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
487 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
489 MMR6Arch<opstr>, MicroMipsR6Inst16 {
611 class DIVMOD_MMR6_DESC_BASE<string opstr, RegisterOperand GPROpnd,
[all …]
DMipsCondMov.td19 class CMov_I_I_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
22 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
27 class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
30 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
36 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
39 !strconcat(opstr, "\t$rd, $rs, $fcc"),
41 Itin, FrmFR, opstr>, HARDFLOAT {
46 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
49 !strconcat(opstr, "\t$fd, $fs, $fcc"),
51 Itin, FrmFR, opstr>, HARDFLOAT {
DMicroMips64r6InstrFormats.td105 class POOL32S_ARITH_FM_MMR6<string opstr, bits<9> funct>
106 : MMR6Arch<opstr> {
121 class DADDIU_FM_MMR6<string opstr> : MMR6Arch<opstr> {
DMips64InstrInfo.td354 class Count1s<string opstr, RegisterOperand RO>:
355 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
356 [(set RO:$rd, (ctpop RO:$rs))], II_POP, FrmR, opstr> {
360 class ExtsCins<string opstr, SDPatternOperator Op = null_frag>:
362 !strconcat(opstr, " $rt, $rs, $pos, $lenm1"),
364 NoItinerary, FrmR, opstr> {
368 class SetCC64_R<string opstr, PatFrag cond_op> :
370 !strconcat(opstr, "\t$rd, $rs, $rt"),
373 II_SEQ_SNE, FrmR, opstr> {
377 class SetCC64_I<string opstr, PatFrag cond_op>:
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMicroMipsDSPInstrFormats.td9 class MMDSPInst<string opstr = "">
13 string BaseOpcode = opstr;
24 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
36 class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
47 class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
60 class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
73 class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
85 class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
98 class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
111 class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
[all …]
DMicroMipsInstrInfo.td198 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
201 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
209 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
212 !strconcat(opstr, "\t$rt, $addr"),
217 let BaseOpcode = opstr;
222 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
225 !strconcat(opstr, "\t$rt, $addr"),
228 let BaseOpcode = opstr;
233 class MovePMM16<string opstr, RegisterOperand RO1, RegisterOperand RO2,
236 !strconcat(opstr, "\t$rd1, $rd2, $rs, $rt"), [],
[all …]
DMipsInstrFPU.td108 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
111 !strconcat(opstr, "\t$fd, $fs, $ft"),
112 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
117 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
119 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
120 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
125 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
127 InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"),
128 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
132 class CVT_PS_S_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
[all …]
DMipsInstrInfo.td1313 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1317 !strconcat(opstr, "\t$rd, $rs, $rt"),
1318 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1325 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1330 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1332 Itin, FrmI, opstr> {
1338 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
1340 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
1347 class LogicNOR<string opstr, RegisterOperand RO>:
1349 !strconcat(opstr, "\t$rd, $rs, $rt"),
[all …]
DMicroMips32r6InstrInfo.td457 class JALRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
458 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
460 MMR6Arch<opstr> {
468 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
471 : MMR6Arch<opstr> {
473 string AsmString = !strconcat(opstr, "\t$rt, $offset");
492 class JRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
493 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
495 MMR6Arch<opstr> {
606 class DIVMOD_MMR6_DESC_BASE<string opstr, RegisterOperand GPROpnd,
[all …]
DMipsCondMov.td18 class CMov_I_I_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
21 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
26 class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
29 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
35 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
38 !strconcat(opstr, "\t$rd, $rs, $fcc"),
40 Itin, FrmFR, opstr>, HARDFLOAT {
45 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
48 !strconcat(opstr, "\t$fd, $fs, $fcc"),
50 Itin, FrmFR, opstr>, HARDFLOAT {
/external/harfbuzz_ng/src/
Dhb-subset-cff-common.hh157 const OPSTR &opstr, in serialize()
162 switch (opstr.op) in serialize()
165 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.charStringsInfo.offset)); in serialize()
168 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.FDArrayInfo.offset)); in serialize()
171 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.FDSelectInfo.offset)); in serialize()
174 return_trace (copy_opstr (c, opstr)); in serialize()
179 unsigned int calculate_serialized_size (const OPSTR &opstr) const in calculate_serialized_size()
181 switch (opstr.op) in calculate_serialized_size()
186 return OpCode_Size (OpCode_longintdict) + 4 + OpCode_Size (opstr.op); in calculate_serialized_size()
189 return opstr.str.length; in calculate_serialized_size()
[all …]
Dhb-subset-cff1.cc133 const cff1_top_dict_val_t &opstr, in serialize()
138 op_code_t op = opstr.op; in serialize()
176 if ( unlikely (!(opstr.str.length >= opstr.last_arg_offset + 3))) in serialize()
178 …supp_op.str = byte_str_t (&opstr.str + opstr.last_arg_offset, opstr.str.length - opstr.last_arg_of… in serialize()
184 …return_trace (cff_top_dict_op_serializer_t<cff1_top_dict_val_t>::serialize (c, opstr, mod.offsets)… in serialize()
189 unsigned int calculate_serialized_size (const cff1_top_dict_val_t &opstr) const in calculate_serialized_size()
191 op_code_t op = opstr.op; in calculate_serialized_size()
213 …return ((OpCode_Size (OpCode_shortint) + 2) * 2) + (opstr.str.length - opstr.last_arg_offset)/* su… in calculate_serialized_size()
216 return cff_top_dict_op_serializer_t<cff1_top_dict_val_t>::calculate_serialized_size (opstr); in calculate_serialized_size()
244 const op_str_t &opstr, in serialize()
[all …]
Dhb-cff-interp-dict-common.hh61 unsigned int calculate_serialized_op_size (const OPSTR& opstr) const in calculate_serialized_op_size()
63 switch (opstr.op) in calculate_serialized_op_size()
67 return OpCode_Size (OpCode_longintdict) + 4 + OpCode_Size (opstr.op); in calculate_serialized_op_size()
70 return opstr.str.length; in calculate_serialized_op_size()
Dhb-subset-cff2.cc54 const op_str_t &opstr, in serialize()
59 switch (opstr.op) in serialize()
62 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.varStoreOffset)); in serialize()
65 return_trace (cff_top_dict_op_serializer_t<>::serialize (c, opstr, offsets)); in serialize()
69 unsigned int calculate_serialized_size (const op_str_t &opstr) const in calculate_serialized_size()
71 switch (opstr.op) in calculate_serialized_size()
74 return OpCode_Size (OpCode_longintdict) + 4 + OpCode_Size (opstr.op); in calculate_serialized_size()
77 return cff_top_dict_op_serializer_t<>::calculate_serialized_size (opstr); in calculate_serialized_size()
/external/icu/icu4c/source/test/cintltst/
Dputiltst.c344 const char *opstr; in TestCompareVersions() local
352 opstr = testCases[j+1]; in TestCompareVersions()
354 switch(opstr[0]) { in TestCompareVersions()
369 log_verbose("%d: %s %s %s, OK\n", (j/3), v1str, opstr, v2str); in TestCompareVersions()
371 …log_err("%d: %s %s %s: wanted values of the same sign, %d got %d\n", (j/3), v1str, opstr, v2str, o… in TestCompareVersions()

123