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Searched refs:or16 (Results 1 – 25 of 38) sorted by relevance

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/external/llvm/test/CodeGen/Mips/llvm-ir/
Dor.ll29 ; MM: or16 $[[T0:[0-9]+]], $5
44 ; MM: or16 $[[T0:[0-9]+]], $5
59 ; MM: or16 $[[T0:[0-9]+]], $5
76 ; MM32: or16 $[[T0:[0-9]+]], $5
95 ; MM32: or16 $[[T0:[0-9]+]], $6
96 ; MM32: or16 $[[T1:[0-9]+]], $7
124 ; MM32: or16 $[[T1]], $4
125 ; MM32: or16 $[[T0]], $5
127 ; MM32: or16 $[[T2]], $6
129 ; MM32: or16 $[[T3]], $7
[all …]
Dlshr.ll129 ; MMR3: or16 $[[T4:[0-9]+]], $[[T0]]
140 ; MMR6: or16 $[[T4:[0-9]+]], $[[T0]]
Dashr.ll135 ; MMR3: or16 $[[T4:[0-9]+]], $[[T0]]
152 ; MMR6: or16 $[[T10:[0-9]+]], $[[T6]]
Dshl.ll145 ; MMR3: or16 $[[T4:[0-9]+]], $[[T0]]
156 ; MMR6: or16 $[[T4:[0-9]+]], $[[T0]]
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dpr33093.ll63 %or16 = or i32 %shl21, %shr13
64 %or19 = or i32 %or16, %shr15
157 %or16 = or i64 %shl33, %shr13
158 %or19 = or i64 %or16, %shr15
/external/llvm/test/CodeGen/X86/
Datomic_idempotent.ll17 define i16 @or16(i16* %p) {
18 ; CHECK-LABEL: or16
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s17 # CHECK-EL: or16 $16, $4 # encoding: [0xc4,0x44]
72 # CHECK-EB: or16 $16, $4 # encoding: [0x44,0xc4]
125 or16 $16, $4
Dmicromips-invalid.s14 or16 $16, $10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
/external/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s17 # CHECK-EL: or16 $16, $4 # encoding: [0xc4,0x44]
72 # CHECK-EB: or16 $16, $4 # encoding: [0x44,0xc4]
125 or16 $16, $4
Dmicromips-invalid.s14 or16 $16, $10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
/external/llvm/test/CodeGen/Mips/
Dmicromips-or16.ll20 ; CHECK: or16
/external/llvm-project/llvm/test/CodeGen/Mips/
Dmicromips-or16.ll20 ; CHECK: or16
/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Dor.ll34 ; MM32-NEXT: or16 $4, $5
61 ; MM32-NEXT: or16 $4, $5
88 ; MM32-NEXT: or16 $4, $5
114 ; MM32-NEXT: or16 $4, $5
141 ; MM32-NEXT: or16 $4, $6
142 ; MM32-NEXT: or16 $5, $7
179 ; MM32-NEXT: or16 $2, $4
180 ; MM32-NEXT: or16 $3, $5
182 ; MM32-NEXT: or16 $4, $6
184 ; MM32-NEXT: or16 $5, $7
[all …]
Dashr.ll366 ; MMR3-NEXT: or16 $3, $2
780 ; MMR3-NEXT: or16 $3, $4
802 ; MMR3-NEXT: or16 $3, $4
804 ; MMR3-NEXT: or16 $5, $4
816 ; MMR3-NEXT: or16 $6, $2
821 ; MMR3-NEXT: or16 $3, $2
834 ; MMR3-NEXT: or16 $7, $6
Dlshr.ll368 ; MMR3-NEXT: or16 $3, $2
797 ; MMR3-NEXT: or16 $2, $5
804 ; MMR3-NEXT: or16 $2, $4
812 ; MMR3-NEXT: or16 $5, $17
824 ; MMR3-NEXT: or16 $4, $2
828 ; MMR3-NEXT: or16 $3, $2
841 ; MMR3-NEXT: or16 $6, $4
Dshl.ll428 ; MMR3-NEXT: or16 $2, $3
873 ; MMR3-NEXT: or16 $3, $4
880 ; MMR3-NEXT: or16 $3, $2
887 ; MMR3-NEXT: or16 $2, $17
899 ; MMR3-NEXT: or16 $3, $4
903 ; MMR3-NEXT: or16 $4, $6
915 ; MMR3-NEXT: or16 $5, $3
/external/llvm-project/lld/COFF/
DChunks.cpp63 static void or16(uint8_t *p, uint16_t v) { write16le(p, read16le(p) | v); } in or16() function
168 or16(off, (s << 10) | ((v >> 12) & 0x3f)); in applyBranch20T()
169 or16(off + 2, (j1 << 13) | (j2 << 11) | ((v >> 1) & 0x7ff)); in applyBranch20T()
178 or16(off, (s << 10) | ((v >> 12) & 0x3ff)); in applyBranch24T()
/external/llvm-project/llvm/test/CodeGen/X86/
Datomic-idempotent.ll49 define i16 @or16(i16* %p) {
50 ; X64-LABEL: or16:
56 ; X86-SSE2-LABEL: or16:
63 ; X86-SLM-LABEL: or16:
75 ; X86-ATOM-LABEL: or16:
/external/llvm-project/llvm/test/DebugInfo/X86/
Ddistringtype.ll74 %or16 = or i32 0, %int_zext, !dbg !13
75 %and17 = and i32 %or16, -17, !dbg !13
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dvalid.s26 or16 $16, $4 # CHECK: or16 $16, $4 # encoding: [0x44,0xc4] label
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s35 or16 $3, $7 # CHECK: or16 $3, $7 # encoding: [0x45,0xf9]
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt15 0xc4 0x44 # CHECK: or16 $16, $4
Dvalid.txt15 0x44 0xc4 # CHECK: or16 $16, $4
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s250 or16 $3, $7 # CHECK: or16 $3, $7 # encoding: [0x45,0xf9]
/external/llvm-project/llvm/test/MC/Mips/micromips32r6/
Dvalid.s299 or16 $3, $7 # CHECK: or16 $3, $7 # encoding: [0x45,0xf9]

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