Searched refs:or_mask (Results 1 – 5 of 5) sorted by relevance
78 uint32_t or_mask = 0; in config_hps_hs_before_warm_reset() local80 or_mask |= RSTMGR_HDSKEN_SDRSELFREFEN; in config_hps_hs_before_warm_reset()81 or_mask |= RSTMGR_HDSKEN_FPGAHSEN; in config_hps_hs_before_warm_reset()82 or_mask |= RSTMGR_HDSKEN_ETRSTALLEN; in config_hps_hs_before_warm_reset()83 or_mask |= RSTMGR_HDSKEN_L2FLUSHEN; in config_hps_hs_before_warm_reset()84 or_mask |= RSTMGR_HDSKEN_L3NOC_DBG; in config_hps_hs_before_warm_reset()85 or_mask |= RSTMGR_HDSKEN_DEBUG_L3NOC; in config_hps_hs_before_warm_reset()87 mmio_setbits_32(SOCFPGA_RSTMGR(HDSKEN), or_mask); in config_hps_hs_before_warm_reset()
247 __u32 or_mask; member269 __u32 or_mask; member291 __u32 or_mask; member
76 GLubyte *or_mask,
3532 static inline unsigned ds_pattern_bitmode(unsigned and_mask, unsigned or_mask, unsigned xor_mask) in ds_pattern_bitmode() argument3534 assert(and_mask < 32 && or_mask < 32 && xor_mask < 32); in ds_pattern_bitmode()3535 return and_mask | (or_mask << 5) | (xor_mask << 10); in ds_pattern_bitmode()
226 unsigned or_mask = (mask >> 5) & 0x1f; in emit_masked_swizzle() local232 if (and_mask == 0x1f && or_mask < 4 && xor_mask < 4) { in emit_masked_swizzle()235 res[i] = ((res[i] | or_mask) ^ xor_mask) & 0x3; in emit_masked_swizzle()237 } else if (and_mask == 0x1f && !or_mask && xor_mask == 8) { in emit_masked_swizzle()239 } else if (and_mask == 0x1f && !or_mask && xor_mask == 0xf) { in emit_masked_swizzle()241 } else if (and_mask == 0x1f && !or_mask && xor_mask == 0x7) { in emit_masked_swizzle()