| /external/mesa3d/src/freedreno/vulkan/ |
| D | tu_nir_lower_multiview.c | 51 nir_ssa_def *orig_src = intrin->src[1].ssa; in lower_multiview_mask() local
60 nir_ssa_def *src = nir_bcsel(&b, cmp, orig_src, nir_imm_float(&b, 0.)); in lower_multiview_mask()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_visitor.cpp | 1385 dst_reg temp, src_reg orig_src, in emit_scratch_read() argument
1388 assert(orig_src.offset % REG_SIZE == 0); in emit_scratch_read()
1389 int reg_offset = base_offset + orig_src.offset / REG_SIZE; in emit_scratch_read()
1390 src_reg index = get_scratch_offset(block, inst, orig_src.reladdr, in emit_scratch_read()
1393 if (type_sz(orig_src.type) < 8) { in emit_scratch_read()
1399 index = get_scratch_offset(block, inst, orig_src.reladdr, reg_offset + 1); in emit_scratch_read()
1613 dst_reg temp, src_reg orig_src, in emit_pull_constant_load() argument
1616 assert(orig_src.offset % 16 == 0); in emit_pull_constant_load()
1625 bool is_64bit = type_sz(orig_src.type) == 8; in emit_pull_constant_load()
1632 src_reg src = orig_src; in emit_pull_constant_load()
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| D | brw_vec4.h | 286 src_reg orig_src,
292 src_reg orig_src,
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| /external/libnl/lib/netfilter/ |
| D | ct_obj.c | 136 struct nl_addr *orig_src, *orig_dst, *reply_src, *reply_dst; in ct_dump_tuples() local
140 orig_src = nfnl_ct_get_src(ct, 0); in ct_dump_tuples()
157 if (orig_src && orig_dst && reply_src && reply_dst && in ct_dump_tuples()
159 !nl_addr_cmp(orig_src, reply_dst) && in ct_dump_tuples()
163 dump_addr(p, orig_src, orig_sport); in ct_dump_tuples()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_tgsi_lower_yuv.c | 81 const struct tgsi_full_src_register *orig_src, in reg_src() argument
85 get_swiz(swiz, &orig_src->Register); in reg_src()
86 *src = *orig_src; in reg_src()
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| /external/tensorflow/tensorflow/core/tpu/graph_rewrite/ |
| D | distributed_tpu_rewrite_pass.cc | 716 Node* control_predecessor, Node* orig_src, in CreateSplitNode() argument
718 const std::string input_assigned_device = orig_src->assigned_device_name(); in CreateSplitNode()
719 Node* to_split_node = orig_src; in CreateSplitNode()
725 orig_src, orig_src_output, graph)); in CreateSplitNode()
764 orig_src->name())}); in CreateSplitNode()
794 int orig_src_output, Node* orig_src, Node* control_predecessor, in CreateOrGetSplitNodesForInputSharding() argument
842 control_predecessor, orig_src, graph)); in CreateOrGetSplitNodesForInputSharding()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_lowering.c | 86 const struct tgsi_full_src_register *orig_src, in reg_src() argument
90 get_swiz(swiz, &orig_src->Register); in reg_src()
91 *src = *orig_src; in reg_src()
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| /external/libvpx/libvpx/vp9/encoder/ |
| D | vp9_rdopt.c | 1791 static INLINE void mi_buf_restore(MACROBLOCK *x, struct buf_2d orig_src, in mi_buf_restore() argument
1794 x->plane[0].src = orig_src; in mi_buf_restore()
2071 const struct buf_2d orig_src = x->plane[0].src; in rd_pick_best_sub8x8_mode() local
2169 mi_buf_restore(x, orig_src, orig_pre); in rd_pick_best_sub8x8_mode()
2192 mi_buf_restore(x, orig_src, orig_pre); in rd_pick_best_sub8x8_mode()
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| D | vp9_pickmode.c | 2834 const struct buf_2d orig_src = p->src; in vp9_pick_inter_mode_sub8x8() local
2949 p->src = orig_src; in vp9_pick_inter_mode_sub8x8()
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