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Searched refs:output_usage_mask (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_shader_info.c78 uint8_t *output_usage_mask = NULL; in gather_intrinsic_store_output_info() local
85 output_usage_mask = info->vs.output_usage_mask; in gather_intrinsic_store_output_info()
88 output_usage_mask = info->tes.output_usage_mask; in gather_intrinsic_store_output_info()
91 output_usage_mask = info->gs.output_usage_mask; in gather_intrinsic_store_output_info()
97 if (output_usage_mask) { in gather_intrinsic_store_output_info()
99 output_usage_mask[idx + i] |= in gather_intrinsic_store_output_info()
583 info->vs.output_usage_mask[VARYING_SLOT_LAYER] |= 0x1; in radv_nir_shader_info_pass()
586 info->tes.output_usage_mask[VARYING_SLOT_LAYER] |= 0x1; in radv_nir_shader_info_pass()
589 info->gs.output_usage_mask[VARYING_SLOT_LAYER] |= 0x1; in radv_nir_shader_info_pass()
634 info->vs.output_usage_mask[VARYING_SLOT_VIEWPORT] |= 0x1; in radv_nir_shader_info_pass()
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Dradv_shader.h266 uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1]; member
278 uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1]; member
292 uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1]; member
Dradv_nir_to_llvm.c780 unsigned output_usage_mask = in visit_emit_vertex_with_counter() local
781 ctx->args->shader_info->gs.output_usage_mask[i]; in visit_emit_vertex_with_counter()
785 int length = util_last_bit(output_usage_mask); in visit_emit_vertex_with_counter()
792 if (!(output_usage_mask & (1 << j))) in visit_emit_vertex_with_counter()
1910 ctx->args->shader_info->vs.output_usage_mask[i]; in handle_vs_outputs_post()
1913 ctx->args->shader_info->tes.output_usage_mask[i]; in handle_vs_outputs_post()
1917 ctx->args->shader_info->gs.output_usage_mask[i]; in handle_vs_outputs_post()
1973 unsigned output_usage_mask; in handle_es_outputs_post() local
1979 output_usage_mask = in handle_es_outputs_post()
1980 ctx->args->shader_info->vs.output_usage_mask[i]; in handle_es_outputs_post()
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/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_vgpu10.c259 ubyte output_usage_mask[PIPE_MAX_SHADER_OUTPUTS]; member
3976 emit_vertex_output_declaration(emit, i, emit->output_usage_mask[i], TRUE); in emit_vs_output_declarations()
4045 emit->output_usage_mask[i]); in emit_gs_output_declarations()
4096 if (emit->output_usage_mask[i]) { in emit_gs_output_declarations()
4102 emit->output_usage_mask[i], in emit_gs_output_declarations()
4288 emit_vertex_output_declaration(emit, i, emit->output_usage_mask[i], in emit_tcs_output_declarations()
4386 emit_vertex_output_declaration(emit, i, emit->output_usage_mask[i], TRUE); in emit_tes_output_declarations()
4580 emit->output_usage_mask[decl->Range.First] = decl->Declaration.UsageMask; in emit_vgpu10_declaration()
5232 emit->output_usage_mask[emit->clip_dist_out_index], in emit_output_declarations()
5241 emit->output_usage_mask[emit->clip_dist_out_index+1], in emit_output_declarations()
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp6948 } else if (!ctx->outputs.mask[i] && ctx->program->info->gs.output_usage_mask[i]) { in ngg_visit_emit_vertex_with_counter()
6954 uint32_t wrmask = ctx->program->info->gs.output_usage_mask[i] & in ngg_visit_emit_vertex_with_counter()
7088 if (!(ctx->program->info->gs.output_usage_mask[i] & (1 << j))) in visit_emit_vertex_with_counter()
11636 ctx->program->info->gs.output_usage_mask[i]; in ngg_gs_export_vertices()
11902 unsigned output_usage_mask = args->shader_info->gs.output_usage_mask[i]; in select_gs_copy_shader() local
11903 unsigned length = util_last_bit(output_usage_mask); in select_gs_copy_shader()
11905 if (!(output_usage_mask & (1 << j))) in select_gs_copy_shader()