Searched refs:pcm_enabled_flag (Results 1 – 19 of 19) sorted by relevance
65 context->desc.h265.pps->sps->pcm_enabled_flag = hevc->pic_fields.bits.pcm_enabled_flag; in vlVaHandlePictureParameterBufferHEVC()66 if (hevc->pic_fields.bits.pcm_enabled_flag == 1) { in vlVaHandlePictureParameterBufferHEVC()
151 context->desc.h265enc.seq.pcm_enabled_flag = h265->seq_fields.bits.pcm_enabled_flag; in vlVaHandleVAEncSequenceParameterBufferTypeHEVC()
454 bool pcm_enabled_flag; member551 uint8_t pcm_enabled_flag; member
366 bool pcm_enabled_flag; member
149 enc->enc_pic.pcm_enabled_flag = pic->seq.pcm_enabled_flag; in radeon_vcn_enc_get_param()
100 enc->enc_pic.pcm_enabled_flag = 0; /*HW not support PCM */ in radeon_uvd_enc_get_param()
444 bool pcm_enabled_flag; member
175 radeon_enc_code_fixed_bits(enc, enc->enc_pic.pcm_enabled_flag, 1); in radeon_enc_nalu_sps_hevc()
459 radeon_uvd_enc_code_fixed_bits(enc, enc->enc_pic.pcm_enabled_flag, 1); in radeon_uvd_enc_nalu_sps_hevc()
429 radeon_enc_code_fixed_bits(enc, enc->enc_pic.pcm_enabled_flag, 1); in radeon_enc_nalu_sps_hevc()
598 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3; in get_h265_msg()
187 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3; in get_h265_msg()
188 uint32_t pcm_enabled_flag : 1; member
445 picture->pps->sps->pcm_enabled_flag = picture_info->pcm_enabled_flag; in vlVdpDecoderRenderH265()
484 sps->pcm_enabled_flag = vl_rbsp_u(rbsp, 1); in seq_parameter_set()485 if (sps->pcm_enabled_flag) { in seq_parameter_set()
6198 deUint32 pcm_enabled_flag:1; member
605 deUint32 pcm_enabled_flag : 1; member
12496 s << "\tpcm_enabled_flag = " << value.pcm_enabled_flag << '\n';