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Searched refs:pipe_aligned (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/amd/common/
Dac_surface.c72 bool pipe_aligned; member
98 bool pipe_aligned; member
128 bool pipe_aligned) in ac_compute_dcc_retile_tile_indices() argument
137 key.pipe_aligned = pipe_aligned; in ac_compute_dcc_retile_tile_indices()
148 din.dccKeyFlags.pipeAligned = pipe_aligned; in ac_compute_dcc_retile_tile_indices()
179 addrin.dccKeyFlags.pipeAligned = pipe_aligned; in ac_compute_dcc_retile_tile_indices()
247 bool pipe_aligned, bool use_uint16, in ac_compute_dcc_retile_map() argument
261 key.pipe_aligned = pipe_aligned; in ac_compute_dcc_retile_map()
276 addrlib, info, in->bpp, in->swizzleMode, rb_aligned, pipe_aligned); in ac_compute_dcc_retile_map()
1326 bool pipe_aligned) in is_dcc_supported_by_DCN() argument
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Dac_surface.h144 unsigned pipe_aligned : 1; /* optimal for TC */ member
/external/mesa3d/src/amd/vulkan/
Dradv_image.c693 .pipe_aligned = 1, in si_set_mutable_tex_desc_fields()
699 state[6] |= S_00A018_META_PIPE_ALIGNED(meta.pipe_aligned) | in si_set_mutable_tex_desc_fields()
722 .pipe_aligned = 1, in si_set_mutable_tex_desc_fields()
729 S_008F24_META_PIPE_ALIGNED(meta.pipe_aligned) | in si_set_mutable_tex_desc_fields()
Dradv_device.c6744 S_028EE0_DCC_PIPE_ALIGNED(surf->u.gfx9.dcc.pipe_aligned); in radv_initialise_color_surface()
6748 .pipe_aligned = 1, in radv_initialise_color_surface()
6757 S_028C74_PIPE_ALIGNED(meta.pipe_aligned); in radv_initialise_color_surface()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_descriptors.c374 .pipe_aligned = 1, in si_set_mutable_tex_desc_fields()
380 state[6] |= S_00A018_META_PIPE_ALIGNED(meta.pipe_aligned) | in si_set_mutable_tex_desc_fields()
412 .pipe_aligned = 1, in si_set_mutable_tex_desc_fields()
419 S_008F24_META_PIPE_ALIGNED(meta.pipe_aligned) | in si_set_mutable_tex_desc_fields()
Dsi_compute_blit.c483 ((struct si_texture *)src)->surface.u.gfx9.dcc.pipe_aligned); in si_compute_copy_image()
Dsi_state.c2770 if (sctx->chip_class >= GFX9 && !tex->surface.u.gfx9.dcc.pipe_aligned) in si_set_framebuffer_state()
2974 S_028EE0_DCC_PIPE_ALIGNED(tex->surface.u.gfx9.dcc.pipe_aligned); in si_emit_framebuffer_state()
3003 .pipe_aligned = 1, in si_emit_framebuffer_state()
3019 S_028C74_PIPE_ALIGNED(meta.pipe_aligned); in si_emit_framebuffer_state()
Dsi_blit.c494 tex->surface.u.gfx9.dcc.pipe_aligned); in si_blit_decompress_color()
/external/mesa3d/docs/relnotes/
D20.2.0.rst3215 - amd: assume CMASK is always rb/pipe_aligned, remove ac_surface.u.gfx9.cmask
3216 - amd: assume HTILE is always rb/pipe_aligned, remove ac_surface.u.gfx9.htile