/external/arm-trusted-firmware/plat/xilinx/versal/ |
D | versal_gicv3.c | 91 gicv3_rdistif_init(plat_my_core_pos()); in plat_versal_gic_init() 92 gicv3_cpuif_enable(plat_my_core_pos()); in plat_versal_gic_init() 100 gicv3_cpuif_enable(plat_my_core_pos()); in plat_versal_gic_cpuif_enable() 108 gicv3_cpuif_disable(plat_my_core_pos()); in plat_versal_gic_cpuif_disable() 117 gicv3_rdistif_init(plat_my_core_pos()); in plat_versal_gic_pcpu_init() 125 gicv3_rdistif_on(plat_my_core_pos()); in plat_versal_gic_redistif_on() 130 gicv3_rdistif_off(plat_my_core_pos()); in plat_versal_gic_redistif_off() 153 gicv3_rdistif_save(plat_my_core_pos(), &rdist_ctx); in plat_versal_gic_save() 176 gicv3_rdistif_init_restore(plat_my_core_pos(), &rdist_ctx); in plat_versal_gic_resume()
|
/external/arm-trusted-firmware/plat/marvell/armada/common/ |
D | marvell_gicv3.c | 103 gicv3_rdistif_init(plat_my_core_pos()); in plat_marvell_gic_init() 104 gicv3_cpuif_enable(plat_my_core_pos()); in plat_marvell_gic_init() 113 gicv3_cpuif_enable(plat_my_core_pos()); in plat_marvell_gic_cpuif_enable() 122 gicv3_cpuif_disable(plat_my_core_pos()); in plat_marvell_gic_cpuif_disable() 131 gicv3_rdistif_init(plat_my_core_pos()); in plat_marvell_gic_pcpu_init() 155 gicv3_rdistif_save(plat_my_core_pos(), &rdist_ctx); in plat_marvell_gic_irq_save() 182 gicv3_rdistif_init_restore(plat_my_core_pos(), &rdist_ctx); in plat_marvell_gic_irq_restore() 200 gicv3_rdistif_save(plat_my_core_pos(), &rdist_ctx); in plat_marvell_gic_irq_pcpu_save() 209 gicv3_rdistif_init_restore(plat_my_core_pos(), &rdist_ctx); in plat_marvell_gic_irq_pcpu_restore()
|
/external/arm-trusted-firmware/plat/brcm/common/ |
D | brcm_gicv3.c | 64 gicv3_rdistif_init(plat_my_core_pos()); in plat_brcm_gic_init() 65 gicv3_cpuif_enable(plat_my_core_pos()); in plat_brcm_gic_init() 70 gicv3_cpuif_enable(plat_my_core_pos()); in plat_brcm_gic_cpuif_enable() 75 gicv3_cpuif_disable(plat_my_core_pos()); in plat_brcm_gic_cpuif_disable() 80 gicv3_rdistif_init(plat_my_core_pos()); in plat_brcm_gic_pcpu_init() 85 gicv3_rdistif_on(plat_my_core_pos()); in plat_brcm_gic_redistif_on() 90 gicv3_rdistif_off(plat_my_core_pos()); in plat_brcm_gic_redistif_off()
|
/external/arm-trusted-firmware/plat/arm/common/ |
D | arm_gicv3.c | 124 gicv3_rdistif_init(plat_my_core_pos()); in plat_arm_gic_init() 125 gicv3_cpuif_enable(plat_my_core_pos()); in plat_arm_gic_init() 133 gicv3_cpuif_enable(plat_my_core_pos()); in plat_arm_gic_cpuif_enable() 141 gicv3_cpuif_disable(plat_my_core_pos()); in plat_arm_gic_cpuif_disable() 168 gicv3_rdistif_init(plat_my_core_pos()); in plat_arm_gic_pcpu_init() 176 gicv3_rdistif_on(plat_my_core_pos()); in plat_arm_gic_redistif_on() 181 gicv3_rdistif_off(plat_my_core_pos()); in plat_arm_gic_redistif_off() 208 gicv3_rdistif_save(plat_my_core_pos(), rdist_context); in plat_arm_gic_save() 236 gicv3_rdistif_init_restore(plat_my_core_pos(), rdist_context); in plat_arm_gic_resume()
|
/external/arm-trusted-firmware/plat/qemu/common/ |
D | qemu_gicv3.c | 38 gicv3_rdistif_init(plat_my_core_pos()); in plat_qemu_gic_init() 39 gicv3_cpuif_enable(plat_my_core_pos()); in plat_qemu_gic_init() 44 gicv3_rdistif_init(plat_my_core_pos()); in qemu_pwr_gic_on_finish() 45 gicv3_cpuif_enable(plat_my_core_pos()); in qemu_pwr_gic_on_finish() 50 gicv3_cpuif_disable(plat_my_core_pos()); in qemu_pwr_gic_off() 51 gicv3_rdistif_off(plat_my_core_pos()); in qemu_pwr_gic_off()
|
/external/arm-trusted-firmware/plat/arm/board/arm_fpga/ |
D | fpga_gicv3.c | 65 gicv3_rdistif_init(plat_my_core_pos()); in plat_fpga_gic_init() 66 gicv3_cpuif_enable(plat_my_core_pos()); in plat_fpga_gic_init() 71 gicv3_rdistif_init(plat_my_core_pos()); in fpga_pwr_gic_on_finish() 72 gicv3_cpuif_enable(plat_my_core_pos()); in fpga_pwr_gic_on_finish() 77 gicv3_cpuif_disable(plat_my_core_pos()); in fpga_pwr_gic_off() 78 gicv3_rdistif_off(plat_my_core_pos()); in fpga_pwr_gic_off()
|
/external/arm-trusted-firmware/plat/qti/common/src/ |
D | qti_gic_v3.c | 106 gicv3_rdistif_init(plat_my_core_pos()); in plat_qti_gic_init() 107 gicv3_cpuif_enable(plat_my_core_pos()); in plat_qti_gic_init() 129 gicv3_cpuif_enable(plat_my_core_pos()); in plat_qti_gic_cpuif_enable() 137 gicv3_cpuif_disable(plat_my_core_pos()); in plat_qti_gic_cpuif_disable() 145 gicv3_rdistif_init(plat_my_core_pos()); in plat_qti_gic_pcpu_init() 153 gicv3_rdistif_on(plat_my_core_pos()); in plat_qti_gic_redistif_on() 158 gicv3_rdistif_off(plat_my_core_pos()); in plat_qti_gic_redistif_off()
|
/external/arm-trusted-firmware/plat/nvidia/tegra/common/ |
D | tegra_gicv3.c | 59 gicv3_rdistif_init(plat_my_core_pos()); in tegra_gic_init() 60 gicv3_cpuif_enable(plat_my_core_pos()); in tegra_gic_init() 68 gicv3_cpuif_disable(plat_my_core_pos()); in tegra_gic_cpuif_deactivate() 77 gicv3_rdistif_init(plat_my_core_pos()); in tegra_gic_pcpu_init() 78 gicv3_cpuif_enable(plat_my_core_pos()); in tegra_gic_pcpu_init()
|
/external/arm-trusted-firmware/plat/mediatek/mt8183/ |
D | plat_mt_gic.c | 68 gicv3_set_interrupt_pending(irq, plat_my_core_pos()); in mt_gic_set_pending() 73 gicv3_cpuif_enable(plat_my_core_pos()); in mt_gic_cpuif_enable() 78 gicv3_cpuif_disable(plat_my_core_pos()); in mt_gic_cpuif_disable() 87 proc_num = plat_my_core_pos(); in mt_gic_rdistif_init() 115 proc_num = plat_my_core_pos(); in mt_gic_rdistif_save() 132 proc_num = plat_my_core_pos(); in mt_gic_rdistif_restore() 156 gicv3_cpuif_enable(plat_my_core_pos()); in mt_gic_init()
|
/external/arm-trusted-firmware/plat/rockchip/common/ |
D | rockchip_gicv3.c | 68 gicv3_rdistif_init(plat_my_core_pos()); in plat_rockchip_gic_init() 69 gicv3_cpuif_enable(plat_my_core_pos()); in plat_rockchip_gic_init() 77 gicv3_cpuif_enable(plat_my_core_pos()); in plat_rockchip_gic_cpuif_enable() 85 gicv3_cpuif_disable(plat_my_core_pos()); in plat_rockchip_gic_cpuif_disable() 94 gicv3_rdistif_init(plat_my_core_pos()); in plat_rockchip_gic_pcpu_init()
|
/external/arm-trusted-firmware/plat/ti/k3/common/ |
D | k3_gicv3.c | 73 gicv3_rdistif_init(plat_my_core_pos()); in k3_gic_init() 74 gicv3_cpuif_enable(plat_my_core_pos()); in k3_gic_init() 79 gicv3_cpuif_enable(plat_my_core_pos()); in k3_gic_cpuif_enable() 84 gicv3_cpuif_disable(plat_my_core_pos()); in k3_gic_cpuif_disable() 89 gicv3_rdistif_init(plat_my_core_pos()); in k3_gic_pcpu_init()
|
/external/arm-trusted-firmware/plat/socionext/synquacer/ |
D | sq_gicv3.c | 77 gicv3_rdistif_init(plat_my_core_pos()); in sq_gic_init() 78 gicv3_cpuif_enable(plat_my_core_pos()); in sq_gic_init() 83 gicv3_cpuif_enable(plat_my_core_pos()); in sq_gic_cpuif_enable() 88 gicv3_cpuif_disable(plat_my_core_pos()); in sq_gic_cpuif_disable() 93 gicv3_rdistif_init(plat_my_core_pos()); in sq_gic_pcpu_init()
|
D | sq_helpers.S | 13 .global plat_my_core_pos symbol 32 func plat_my_core_pos 35 endfunc plat_my_core_pos 66 bl plat_my_core_pos
|
/external/arm-trusted-firmware/plat/common/ |
D | plat_gicv3.c | 120 return gicv3_get_interrupt_type(id, plat_my_core_pos()); in plat_ic_get_interrupt_type() 206 return gicv3_get_interrupt_active(id, plat_my_core_pos()); in plat_ic_get_interrupt_active() 211 gicv3_enable_interrupt(id, plat_my_core_pos()); in plat_ic_enable_interrupt() 216 gicv3_disable_interrupt(id, plat_my_core_pos()); in plat_ic_disable_interrupt() 221 gicv3_set_interrupt_priority(id, plat_my_core_pos(), priority); in plat_ic_set_interrupt_priority() 233 gicv3_set_interrupt_type(id, plat_my_core_pos(), type); in plat_ic_set_interrupt_type() 273 gicv3_set_interrupt_pending(id, plat_my_core_pos()); in plat_ic_set_interrupt_pending() 280 gicv3_clear_interrupt_pending(id, plat_my_core_pos()); in plat_ic_clear_interrupt_pending()
|
/external/arm-trusted-firmware/plat/mediatek/mt8192/ |
D | plat_pm.c | 64 assert(cpu == plat_my_core_pos()); in plat_cpu_pwrdwn_common() 84 assert(cpu == plat_my_core_pos()); in plat_cpu_pwron_common() 117 assert(cpu == plat_my_core_pos()); in plat_cluster_pwrdwn_common() 132 assert(cpu == plat_my_core_pos()); in plat_cluster_pwron_common() 150 assert(cpu == plat_my_core_pos()); in plat_mcusys_pwrdwn_common() 163 assert(cpu == plat_my_core_pos()); in plat_mcusys_pwron_common() 252 unsigned int cpu = plat_my_core_pos(); in plat_power_domain_suspend() 274 unsigned int cpu = plat_my_core_pos(); in plat_power_domain_suspend_finish() 299 unsigned int cpu = plat_my_core_pos(); in plat_validate_power_state() 325 unsigned int cpu = plat_my_core_pos(); in plat_get_sys_suspend_power_state()
|
D | plat_mt_gic.c | 63 gicv3_set_interrupt_pending(irq, plat_my_core_pos()); in mt_gic_set_pending() 82 proc_num = plat_my_core_pos(); in mt_gic_rdistif_init() 100 proc_num = plat_my_core_pos(); in mt_gic_rdistif_save() 117 proc_num = plat_my_core_pos(); in mt_gic_rdistif_restore() 175 gicv3_rdistif_init(plat_my_core_pos()); in mt_gic_init() 176 gicv3_cpuif_enable(plat_my_core_pos()); in mt_gic_init()
|
/external/arm-trusted-firmware/plat/imx/common/ |
D | plat_imx8_gic.c | 81 gicv3_rdistif_init(plat_my_core_pos()); in plat_gic_init() 82 gicv3_cpuif_enable(plat_my_core_pos()); in plat_gic_init() 87 gicv3_cpuif_enable(plat_my_core_pos()); in plat_gic_cpuif_enable() 92 gicv3_cpuif_disable(plat_my_core_pos()); in plat_gic_cpuif_disable() 97 gicv3_rdistif_init(plat_my_core_pos()); in plat_gic_pcpu_init()
|
/external/arm-trusted-firmware/plat/socionext/uniphier/ |
D | uniphier_gicv3.c | 99 gicv3_rdistif_init(plat_my_core_pos()); in uniphier_gic_init() 100 gicv3_cpuif_enable(plat_my_core_pos()); in uniphier_gic_init() 105 gicv3_cpuif_enable(plat_my_core_pos()); in uniphier_gic_cpuif_enable() 110 gicv3_cpuif_disable(plat_my_core_pos()); in uniphier_gic_cpuif_disable() 115 gicv3_rdistif_init(plat_my_core_pos()); in uniphier_gic_pcpu_init()
|
D | uniphier_helpers.S | 11 .global plat_my_core_pos symbol 27 func plat_my_core_pos 30 endfunc plat_my_core_pos
|
/external/arm-trusted-firmware/services/spd/tspd/ |
D | tspd_pm.c | 33 uint32_t linear_id = plat_my_core_pos(); in tspd_cpu_off_handler() 72 uint32_t linear_id = plat_my_core_pos(); in tspd_cpu_suspend_handler() 108 uint32_t linear_id = plat_my_core_pos(); in tspd_cpu_on_finish_handler() 153 uint32_t linear_id = plat_my_core_pos(); in tspd_cpu_suspend_finish_handler() 192 uint32_t linear_id = plat_my_core_pos(); in tspd_system_off() 218 uint32_t linear_id = plat_my_core_pos(); in tspd_system_reset()
|
/external/arm-trusted-firmware/services/spd/opteed/ |
D | opteed_pm.c | 32 uint32_t linear_id = plat_my_core_pos(); in opteed_cpu_off_handler() 65 uint32_t linear_id = plat_my_core_pos(); in opteed_cpu_suspend_handler() 98 uint32_t linear_id = plat_my_core_pos(); in opteed_cpu_on_finish_handler() 134 uint32_t linear_id = plat_my_core_pos(); in opteed_cpu_suspend_finish_handler() 173 uint32_t linear_id = plat_my_core_pos(); in opteed_system_off() 193 uint32_t linear_id = plat_my_core_pos(); in opteed_system_reset()
|
/external/arm-trusted-firmware/plat/xilinx/versal/aarch64/ |
D | versal_helpers.S | 16 .globl plat_my_core_pos symbol 42 bl plat_my_core_pos 54 func plat_my_core_pos 57 endfunc plat_my_core_pos
|
/external/arm-trusted-firmware/bl32/tsp/ |
D | tsp_main.c | 62 linear_id = plat_my_core_pos(); in set_smc_args() 108 uint32_t linear_id = plat_my_core_pos(); in tsp_main() 140 uint32_t linear_id = plat_my_core_pos(); in tsp_cpu_on_main() 177 uint32_t linear_id = plat_my_core_pos(); in tsp_cpu_off_main() 220 uint32_t linear_id = plat_my_core_pos(); in tsp_cpu_suspend_main() 262 uint32_t linear_id = plat_my_core_pos(); in tsp_cpu_resume_main() 300 uint32_t linear_id = plat_my_core_pos(); in tsp_system_off_main() 332 uint32_t linear_id = plat_my_core_pos(); in tsp_system_reset_main() 370 uint32_t linear_id = plat_my_core_pos(); in tsp_smc_handler()
|
/external/arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/ |
D | zynqmp_helpers.S | 14 .globl plat_my_core_pos symbol 51 bl plat_my_core_pos 63 func plat_my_core_pos 66 endfunc plat_my_core_pos
|
/external/arm-trusted-firmware/plat/mediatek/mt8183/aarch64/ |
D | plat_helpers.S | 12 .globl plat_my_core_pos symbol 28 func plat_my_core_pos 34 endfunc plat_my_core_pos
|