Searched refs:ppc_altivec_vrlw (Results 1 – 10 of 10) sorted by relevance
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
D | IntrinsicsPowerPC.h | 187 ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw enumerator
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D | IntrinsicImpl.inc | 31508 {Intrinsic::ppc_altivec_vrlw, 93738}, // __builtin_altivec_vrlw
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 7324 Intrinsic::ppc_altivec_vrlw in LowerBUILD_VECTOR() 8178 BuildIntrinsicOp(Intrinsic::ppc_altivec_vrlw, RHS, Neg16, DAG, dl); in LowerMUL()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 8877 Intrinsic::ppc_altivec_vrlw in LowerBUILD_VECTOR() 10254 BuildIntrinsicOp(Intrinsic::ppc_altivec_vrlw, RHS, Neg16, DAG, dl); in LowerMUL()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 9535 Intrinsic::ppc_altivec_vrlw in LowerBUILD_VECTOR() 10877 BuildIntrinsicOp(Intrinsic::ppc_altivec_vrlw, RHS, Neg16, DAG, dl); in LowerMUL()
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/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Intrinsics.gen | 3967 ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw 32250 {Intrinsic::ppc_altivec_vrlw, 81478}, // __builtin_altivec_vrlw
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/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 3967 ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw 32250 {Intrinsic::ppc_altivec_vrlw, 81478}, // __builtin_altivec_vrlw
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/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Intrinsics.gen | 3967 ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw 32250 {Intrinsic::ppc_altivec_vrlw, 81478}, // __builtin_altivec_vrlw
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/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
D | Intrinsics.gen | 3967 ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw 32250 {Intrinsic::ppc_altivec_vrlw, 81478}, // __builtin_altivec_vrlw
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/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 3961 ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw 32069 {Intrinsic::ppc_altivec_vrlw, 81536}, // __builtin_altivec_vrlw
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