Searched refs:prev_inst (Results 1 – 5 of 5) sorted by relevance
52 backend_instruction *const prev_inst = prev_block->end(); in dead_control_flow_eliminate() local58 prev_inst->opcode == BRW_OPCODE_ELSE) { in dead_control_flow_eliminate()60 backend_instruction *const else_inst = prev_inst; in dead_control_flow_eliminate()65 prev_inst->opcode == BRW_OPCODE_IF) { in dead_control_flow_eliminate()69 backend_instruction *const if_inst = prev_inst; in dead_control_flow_eliminate()102 prev_inst->opcode == BRW_OPCODE_IF) { in dead_control_flow_eliminate()104 backend_instruction *const if_inst = prev_inst; in dead_control_flow_eliminate()
315 for (vec4_instruction *prev_inst = (vec4_instruction *) inst->prev; in can_use_scratch_for_source() local316 !prev_inst->is_head_sentinel(); in can_use_scratch_for_source()317 prev_inst = (vec4_instruction *) prev_inst->prev) { in can_use_scratch_for_source()323 if (prev_inst->dst.file == VGRF && prev_inst->dst.nr == scratch_reg) { in can_use_scratch_for_source()324 return (!prev_inst->predicate || prev_inst->opcode == BRW_OPCODE_SEL) && in can_use_scratch_for_source()326 ~prev_inst->dst.writemask) == 0; in can_use_scratch_for_source()333 if (prev_inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE || in can_use_scratch_for_source()334 prev_inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_READ) in can_use_scratch_for_source()342 if (prev_inst->src[n].file == VGRF && in can_use_scratch_for_source()343 prev_inst->src[n].nr == scratch_reg) { in can_use_scratch_for_source()
3411 fs_inst *prev_inst = last_mrf_move[inst->dst.nr]; in remove_duplicate_mrf_writes() local3412 if (prev_inst && prev_inst->opcode == BRW_OPCODE_MOV && in remove_duplicate_mrf_writes()3413 inst->dst.equals(prev_inst->dst) && in remove_duplicate_mrf_writes()3414 inst->src[0].equals(prev_inst->src[0]) && in remove_duplicate_mrf_writes()3415 inst->saturate == prev_inst->saturate && in remove_duplicate_mrf_writes()3416 inst->predicate == prev_inst->predicate && in remove_duplicate_mrf_writes()3417 inst->conditional_mod == prev_inst->conditional_mod && in remove_duplicate_mrf_writes()3418 inst->exec_size == prev_inst->exec_size) { in remove_duplicate_mrf_writes()
761 struct schedule_node *prev_inst) in choose_instruction_to_schedule() argument769 if (prev_inst) { in choose_instruction_to_schedule()770 if (prev_inst->inst->qpu.sig.thrsw) in choose_instruction_to_schedule()824 if (prev_inst) { in choose_instruction_to_schedule()831 if (prev_inst->inst->uniform != -1 && in choose_instruction_to_schedule()845 &prev_inst->inst->qpu, inst)) { in choose_instruction_to_schedule()854 if (prev_inst) in choose_instruction_to_schedule()1235 vir_for_each_inst_rev(prev_inst, block) { in emit_thrsw()1236 struct v3d_qpu_sig sig = prev_inst->qpu.sig; in emit_thrsw()1244 prev_inst, slots_filled + 1, in emit_thrsw()[all …]
552 struct schedule_node *prev_inst) in choose_instruction_to_schedule() argument560 if (prev_inst) { in choose_instruction_to_schedule()561 uint32_t prev_sig = QPU_GET_FIELD(prev_inst->inst->inst, in choose_instruction_to_schedule()602 if (prev_inst) { in choose_instruction_to_schedule()611 if (prev_inst->uniform != -1 && n->uniform != -1) in choose_instruction_to_schedule()622 inst = qpu_merge_inst(prev_inst->inst->inst, inst); in choose_instruction_to_schedule()