| /external/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 25 qadd16 r0, r0, r0 label
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| D | basic-arm-instructions.s | 1789 qadd16 r1, r2, r3
1796 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
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| D | basic-thumb2-instructions.s | 1855 qadd16 r1, r2, r3
1863 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x13,0xf1]
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 25 qadd16 r0, r0, r0 label
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| D | basic-arm-instructions.s | 1819 qadd16 r1, r2, r3
1826 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
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| D | basic-thumb2-instructions.s | 2064 qadd16 r1, r2, r3
2072 @ CHECK: qadd16 r1, r2, r3 @ encoding: [0x92,0xfa,0x13,0xf1]
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 172 define i32 @qadd16(i32 %a, i32 %b) nounwind {
173 ; CHECK-LABEL: qadd16
174 ; CHECK: qadd16 r0, r0, r1
175 %tmp = call i32 @llvm.arm.qadd16(i32 %a, i32 %b)
446 declare i32 @llvm.arm.qadd16(i32, i32) nounwind
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| D | dsp-loop-indexing.ll | 287 %qadd.1 = call i32 @llvm.arm.qadd16(i32 %a.1, i32 %b.1)
297 %qadd.2 = call i32 @llvm.arm.qadd16(i32 %a.2, i32 %b.2)
310 declare i32 @llvm.arm.qadd16(i32, i32)
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| D | sadd_sat_plus.ll | 259 ; CHECK-T2DSP-NEXT: qadd16 r0, r0, r1
266 ; CHECK-ARM-NEXT: qadd16 r0, r0, r1
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| D | sadd_sat.ll | 268 ; CHECK-T2DSP-NEXT: qadd16 r0, r0, r1
298 ; CHECK-ARMDSP-NEXT: qadd16 r0, r0, r1
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 53 M(qadd16) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 54 M(qadd16) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 209 qadd16 r0, r1, r2 label
641 # CHECK-NEXT: 1 2 1.00 qadd16 r0, r1, r2
1081 …50 - - - - 1.00 - - - - - - qadd16 r0, r1, r2
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| D | m4-int.s | 216 qadd16 r0, r1, r2 label
663 # CHECK-NEXT: 1 1 1.00 qadd16 r0, r1, r2
1101 # CHECK-NEXT: 1.00 qadd16 r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 418 qadd16 r1, r2, r3
1288 # CHECK-NEXT: 1 2 1.00 U qadd16 r1, r2, r3
2165 # CHECK-NEXT: - - - - 1.00 - - - qadd16 r1, r2, r3
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| D | cortex-a57-thumb.s | 477 qadd16 r1, r2, r3
1385 # CHECK-NEXT: 1 2 1.00 qadd16 r1, r2, r3
2299 # CHECK-NEXT: - - - - 1.00 - - - qadd16 r1, r2, r3
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 492 0x13,0x1f,0x22,0xe6 = qadd16 r1, r2, r3
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2827 void qadd16(Condition cond, Register rd, Register rn, Register rm);
2828 void qadd16(Register rd, Register rn, Register rm) { qadd16(al, rd, rn, rm); } in qadd16() function
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| D | disasm-aarch32.h | 990 void qadd16(Condition cond, Register rd, Register rn, Register rm);
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1135 # CHECK: qadd16 r1, r2, r3
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| D | thumb2.txt | 1367 # CHECK: qadd16 r1, r2, r3
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1367 # CHECK: qadd16 r1, r2, r3
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| D | basic-arm-instructions.txt | 1135 # CHECK: qadd16 r1, r2, r3
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 568 { /* ARM_QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */
5848 { /* ARM_t2QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 568 { /* ARM_QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */
5848 { /* ARM_t2QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */
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