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Searched refs:r100 (Results 1 – 18 of 18) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_blit.c80 static inline void emit_vtx_state(struct r100_context *r100) in emit_vtx_state() argument
82 BATCH_LOCALS(&r100->radeon); in emit_vtx_state()
85 if (r100->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { in emit_vtx_state()
103 static void inline emit_tx_setup(struct r100_context *r100, in emit_tx_setup() argument
112 BATCH_LOCALS(&r100->radeon); in emit_tx_setup()
152 static inline void emit_cb_setup(struct r100_context *r100, in emit_cb_setup() argument
162 BATCH_LOCALS(&r100->radeon); in emit_cb_setup()
216 static GLboolean validate_buffers(struct r100_context *r100, in validate_buffers() argument
222 radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs); in validate_buffers()
224 ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs, in validate_buffers()
[all …]
Dradeon_state_init.c262 r100ContextPtr r100 = R100_CONTEXT(ctx); in scl_emit() local
263 BATCH_LOCALS(&r100->radeon); in scl_emit()
274 r100ContextPtr r100 = R100_CONTEXT(ctx); in vec_emit() local
275 BATCH_LOCALS(&r100->radeon); in vec_emit()
286 r100ContextPtr r100 = R100_CONTEXT(ctx); in lit_emit() local
287 BATCH_LOCALS(&r100->radeon); in lit_emit()
298 r100ContextPtr r100 = R100_CONTEXT(ctx); in check_always_ctx() local
302 rrb = radeon_get_colorbuffer(&r100->radeon); in check_always_ctx()
307 drb = radeon_get_depthbuffer(&r100->radeon); in check_always_ctx()
320 r100ContextPtr r100 = R100_CONTEXT(ctx); in ctx_emit_cs() local
[all …]
Dradeon_blit.h31 void r100_blit_init(struct r100_context *r100);
Dmeson.build76 'r100',
Dradeon_state.c2087 r100ContextPtr r100 = R100_CONTEXT(ctx); in radeonPolygonStipple() local
2090 radeon_firevertices(&r100->radeon); in radeonPolygonStipple()
2092 RADEON_STATECHANGE(r100, stp); in radeonPolygonStipple()
2097 r100->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i]; in radeonPolygonStipple()
/external/mesa3d/docs/relnotes/
D17.1.2.rst91 - r100: Don't assume that the base mipmap of a texture exists
92 - r100,r200: Don't assume glVisual is non-NULL during context creation
93 - r100: Use \_mesa_get_format_base_format in radeon_update_wrapper
D7.9.1.rst138 - r100: revalidate after radeon_update_renderbuffers
D7.10.rst152 - r100: revalidate after radeon_update_renderbuffers
D19.3.0.rst1152 - r100/r200: factor out txformat/txfilter setup from the TFP path.
D20.0.0.rst914 - r100: Use preprocessor to select big vs little endian paths
D20.3.0.rst62 - GL_MESA_pack_invert on r100 and vieux
/external/fonttools/Lib/fontTools/pens/
DmomentsPen.py240 r100 = x1*x3*y1
284 …75*(378*y2 - 630*y3)/9240 + x0**3*(r57 + r62 + 165*y0 + y3)/660 + x0*(-18*r100 - r101*y0 - r101*y1…
285 …r2*r85 - r23*r85 + r30*y3 + 84*r40*y2 - 84*r42*y1 + r60*x3)/9240 - y0*(54*r100 - 9*r105 + 81*r106 …
/external/autotest/docs/
Duser-doc.md496 1. We have ebuild **foo-0.0.1-r100** with **test** and would like to split
502 2. Remove **test** from foo-{0.0.1-r100,9999}; uprev foo-0.0.1-r100 (to -r101)
508 5. Add a blocker. Since bar installs files owned by foo-0.0.1-r100 and earlier,
511 RDEPEND="!<=foo-0.0.1-r100"
521 RDEPEND=">foo-0.0.1-r100"
/external/mesa3d/
Dmeson_options.txt48 choices : ['auto', 'i915', 'i965', 'r100', 'r200', 'nouveau', 'swrast'],
Dmeson.build163 dri_drivers = ['i915', 'i965', 'r100', 'r200', 'nouveau']
167 dri_drivers = ['r100', 'r200', 'nouveau']
183 with_dri_r100 = dri_drivers.contains('r100')
/external/llvm/test/Analysis/CostModel/ARM/
Dcast.ll229 …; CHECK: Found an estimated cost of 16 for instruction: %r100 = fptoui <2 x double> undef to <2…
230 %r100 = fptoui <2 x double> undef to <2 x i1>
/external/llvm-project/llvm/test/Analysis/CostModel/AArch64/
Dcast.ll120 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %r100 = fptoui <2 x double…
386 %r100 = fptoui <2 x double> undef to <2 x i1>
/external/llvm-project/llvm/test/Analysis/CostModel/ARM/
Dcast.ll179 ; CHECK-NEON-RECIP-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %r100 = fptoui…
566 ; CHECK-MVE-RECIP-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %r100 = fptoui …
953 ; CHECK-V8M-MAIN-RECIP-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %r100 = fpt…
1340 ; CHECK-V8M-BASE-RECIP-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %r100 = fpt…
1727 ; CHECK-V8R-RECIP-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %r100 = fptoui …
2114 ; CHECK-MVE-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %r100 = fptoui <2…
2501 ; CHECK-V8M-MAIN-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %r100 = fpto…
2888 ; CHECK-V8M-BASE-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %r100 = fpto…
3275 ; CHECK-V8R-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %r100 = fptoui <2…
3683 %r100 = fptoui <2 x double> undef to <2 x i1>