| /external/llvm-project/llvm/test/MC/AVR/ |
| D | modifiers.s | 8 ldi r24, lo8(0x42)
9 ldi r24, lo8(0x2342)
11 ldi r24, lo8(0x23)
12 ldi r24, hi8(0x2342)
14 ; CHECK: ldi r24, lo8(66) ; encoding: [0x82,0xe4]
15 ; CHECK: ldi r24, lo8(9026) ; encoding: [0x82,0xe4]
17 ; CHECK: ldi r24, lo8(35) ; encoding: [0x83,0xe2]
18 ; CHECK: ldi r24, hi8(9026) ; encoding: [0x83,0xe2]
23 ldi r24, lo8(bar)
24 ldi r24, hi8(bar)
[all …]
|
| D | inst-sbiw.s | 16 sbiw r24, 1
17 sbiw r24, 2
19 sbiw r24, SYMBOL-1
30 ; CHECK: sbiw r24, 1 ; encoding: [0x01,0x97]
31 ; CHECK: sbiw r24, 2 ; encoding: [0x02,0x97]
33 ; CHECK: sbiw r24, SYMBOL-1 ; encoding: [0b00AAAAAA,0x97]
45 ; CHECK-INST: sbiw r24, 1
46 ; CHECK-INST: sbiw r24, 2
48 ; CHECK-INST: sbiw r24, 0
|
| D | inst-adiw.s | 15 adiw r24, 63
16 adiw r24, 0
19 adiw r24, SYMBOL
29 ; CHECK: adiw r24, 63 ; encoding: [0xcf,0x96]
30 ; CHECK: adiw r24, 0 ; encoding: [0x00,0x96]
33 ; CHECK: adiw r24, SYMBOL ; encoding: [0b00AAAAAA,0x96]
44 ; CHECK-INST: adiw r24, 63
45 ; CHECK-INST: adiw r24, 0
48 ; CHECK-INST: adiw r24, 0
|
| D | syntax-reg-pair.s | 5 sbiw r24, 1
6 sbiw r25:r24, 2
7 sbiw r24, 2
10 ; CHECK: sbiw r24, 1 ; encoding: [0x01,0x97]
11 ; CHECK: sbiw r24, 2 ; encoding: [0x02,0x97]
12 ; CHECK: sbiw r24, 2 ; encoding: [0x02,0x97]
|
| D | relocations.s | 16 adiw r24, FOO
39 ldi r24, lo8(bar+3)
75 ldi r24, hlo8(foo)
76 ldi r24, +hlo8(foo)
77 ldi r24, hlo8(+(foo))
81 ldi r24, -hlo8(foo)
82 ldi r24, hlo8(-(foo))
87 ldi r24, hhi8(bar)
88 ldi r24, +hhi8(bar)
89 ldi r24, hhi8(+(bar))
[all …]
|
| D | hex-immediates.s | 5 ; DEC: ldi r24, 66
6 ; HEX: ldi r24, 0x42
7 ldi r24, 0x42
|
| /external/llvm-project/llvm/test/CodeGen/AVR/ |
| D | sub.ll | 5 ; CHECK: sub r24, r22
12 ; CHECK: subi r24, 5
19 ; CHECK: dec r24
26 ; CHECK: sub r24, r22
34 ; CHECK: sbiw r24, 63
41 ; CHECK: subi r24, 210
51 ; CHECK: sbc r24, r20
61 ; CHECK: sbci r24, 91
74 ; CHECK: sbc r24, r16
88 ; CHECK: sbci r24, 236
|
| D | add.ll | 5 ; CHECK: add r24, r22
12 ; CHECK: subi r24, -5
19 ; CHECK: inc r24
27 ; CHECK: add r24, r22
35 ; CHECK: adiw r24, 63
42 ; CHECK: subi r24, 133
52 ; CHECK: add r24, r18
63 ; CHECK: adc r24, r20
73 ; CHECK: sbci r24, 255
87 ; CHECK: adc r24, r20
[all …]
|
| D | or.ll | 5 ; CHECK: or r24, r22
12 ; CHECK: ori r24, 5
19 ; CHECK: or r24, r22
27 ; CHECK: ori r24, 210
37 ; CHECK: or r24, r20
47 ; CHECK: ori r24, 91
61 ; CHECK: or r24, r16
75 ; CHECK: ori r24, 204
|
| D | and.ll | 5 ; CHECK: and r24, r22
12 ; CHECK: andi r24, 5
19 ; CHECK: and r24, r22
27 ; CHECK: andi r24, 210
37 ; CHECK: and r24, r20
47 ; CHECK: andi r24, 91
61 ; CHECK: and r24, r16
76 ; CHECK: andi r24, 31
|
| D | return.ll | 15 ; CHECK: ldi r24, 5
28 ; CHECK: mov r24, r20
34 ; CHECK: ldi r24, 57
48 ; CHECK: movw r24, r20
56 ; CHECK: ldi r24, 91
71 ; CHECK: movw r24, r16
83 ; CHECK: ldi r24, 236
105 ; CHECK: ldd r24, Y+11
118 ; CHECK: ldd r24, Y+7
|
| D | directmem.ll | 29 ; CHECK: lds r24, char
50 ; CHECK: lds r24, char.array+2
57 ; CHECK: lds r24, char.static
58 ; CHECK: inc r24
59 ; CHECK: sts char.static, r24
78 ; CHECK: lds r24, int
109 ; CHECK: lds r24, int.array+4
117 ; CHECK: lds r24, int.static
119 ; CHECK: adiw r24, 1
121 ; CHECK: sts int.static, r24
[all …]
|
| D | eor.ll | 7 ; CHECK: eor r24, r22
15 ; CHECK: eor r24, r25
22 ; CHECK: eor r24, r22
32 ; CHECK: eor r24, r18
42 ; CHECK: eor r24, r20
66 ; CHECK: eor r24, r16
88 ; CHECK: eor r24, r30
|
| D | hardware-mul.ll | 7 ; CHECK: muls r22, r24
9 ; CHECK: mov r24, r0
18 ; CHECK: mul r22, r24
23 ; CHECK: muls r23, r24
|
| D | com.ll | 5 ; CHECK: com r24
12 ; CHECK: com r24
22 ; CHECK: com r24
36 ; CHECK: com r24
|
| D | call.ll | 20 ; CHECK: ldi r24, 12
22 ; CHECK: ldi r24, 12
44 ; CHECK: ldi r24, 1
72 ; CHECK: ldi r24, 15
106 ; CHECK: ldi r24, 31
174 ; CHECK: movw r30, r24
177 ; CHECK: ldi r24, 214
182 ; CHECK: sbci r24, 255
195 ; CHECK: movw [[REG1:(r[0-9]+|[XYZ])]], r24
198 ; CHECK: movw r24, r20
[all …]
|
| D | software-mul.ll | 11 ; CHECK: mov r25, r24
12 ; CHECK: mov r24, r22
21 ; CHECK: movw r18, r24
22 ; CHECK: movw r24, r22
|
| D | progmem.ll | 8 ; CHECK: movw r30, r24
9 ; CHECK: lpm r24, Z
16 ; CHECK: movw r30, r24
17 ; CHECK: lpm r24, Z+
25 ; CHECK: movw r30, r24
49 ; CHECK: movw r30, r24
|
| D | progmem-extended.ll | 10 ; CHECK: movw r30, r24
11 ; CHECK: lpm r24, Z
18 ; CHECK: movw r30, r24
19 ; CHECK: lpmw r24, Z
26 ; CHECK: movw r30, r24
50 ; CHECK: movw r30, r24
|
| D | xor.ll | 5 ; CHECK: eor r24, r22
12 ; CHECK: eor r24, r22
22 ; CHECK: eor r24, r20
36 ; CHECK: eor r24, r16
|
| D | load.ll | 5 ; CHECK: ld r24, {{[XYZ]}}
12 ; CHECK: ld r24, [[PTR:[YZ]]]
20 ; CHECK: ldd r24, {{[YZ]}}+63
28 ; CHECK: movw r26, r24
31 ; CHECK: ld r24, {{[XYZ]}}
39 ; CHECK: ldd r24, [[PTR:[YZ]]]+62
48 ; CHECK: subi r24, 192
50 ; CHECK: movw r30, r24
51 ; CHECK: ld r24, [[PTR:[YZ]]]
|
| /external/llvm-project/llvm/test/CodeGen/AVR/features/ |
| D | xmega_io.ll | 20 ; XMEGA: in r24, 8
21 ; AVR: lds r24, 8
28 ; XMEGA: in r24, 40
29 ; AVR: in r24, 8
36 ; XMEGA: lds r24, 80
37 ; AVR: in r24, 48
44 ; XMEGA: lds r24, 160
45 ; AVR: lds r24, 160
|
| /external/llvm-project/llvm/test/CodeGen/AVR/calling-conv/c/ |
| D | return.ll | 5 ; CHECK: ldi r24, 64
11 ; CHECK: ldi r24, 0
20 ; CHECK-NEXT: ldi r24, 188
33 ; CHECK-NEXT: mov r24, r18
|
| D | call.ll | 13 ; CHECK: ldi r24, 64
24 ; CHECK-NEXT: ldi r24, 64
31 ; CHECK: ldi r24, 1
43 ; CHECK-NEXT: ldi r24, 2
60 ; CHECK-NEXT: ldi r24, 2
74 ; CHECK-NEXT: ldi r24, 2
|
| D | stack.ll | 14 ; CHECK-NEXT: ldd r24, Y+7
18 ; CHECK-NEXT: sts 6, r24
21 ; CHECK-NEXT: ldd r24, Y+5
25 ; CHECK-NEXT: sts 4, r24
|