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Searched refs:rD (Results 1 – 25 of 56) sorted by relevance

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/external/lzma/Asm/x86/
DXzCrc64Opt.asm10 rD equ r9 define
16 SRCDAT equ rN + rD
23 movzx x6, BYTE PTR [rD]
24 inc rD
38 mov rD, r2
42 test rD, 3
49 add rN, rD
53 sub rD, rN
63 mov rD, rN
65 sub rN, rD
[all …]
D7zCrcOpt.asm8 rD equ r2 define
21 SRCDAT equ rN + rD + 4 *
36 movzx x6, BYTE PTR [rD]
37 inc rD
54 test rD, 7
61 add rN, rD
65 sub rD, rN
71 mov rD, rN
73 sub rN, rD
110 add rD, 8
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td240 def LDARX : XForm_1<31, 84, (outs g8rc:$rD), (ins memrr:$ptr),
241 "ldarx $rD, $ptr", IIC_LdStLDARX, []>;
245 def LDARXL : XForm_1<31, 84, (outs g8rc:$rD), (ins memrr:$ptr),
246 "ldarx $rD, $ptr, 1", IIC_LdStLDARX, []>, isDOT;
249 def LDAT : X_RD5_RS5_IM5<31, 614, (outs g8rc:$rD), (ins g8rc:$rA, u5imm:$FC),
250 "ldat $rD, $rA, $FC", IIC_LdStLoad>, isPPC64,
420 def LI8 : DForm_2_r0<14, (outs g8rc:$rD), (ins s16imm64:$imm),
421 "li $rD, $imm", IIC_IntSimple,
422 [(set i64:$rD, imm64SExt16:$imm)]>;
423 def LIS8 : DForm_2_r0<15, (outs g8rc:$rD), (ins s17imm64:$imm),
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td252 def LDARX : XForm_1_memOp<31, 84, (outs g8rc:$rD), (ins memrr:$ptr),
253 "ldarx $rD, $ptr", IIC_LdStLDARX, []>;
257 def LDARXL : XForm_1<31, 84, (outs g8rc:$rD), (ins memrr:$ptr),
258 "ldarx $rD, $ptr, 1", IIC_LdStLDARX, []>, isRecordForm;
261 def LDAT : X_RD5_RS5_IM5<31, 614, (outs g8rc:$rD), (ins g8rc:$rA, u5imm:$FC),
262 "ldat $rD, $rA, $FC", IIC_LdStLoad>, isPPC64,
439 def LI8 : DForm_2_r0<14, (outs g8rc:$rD), (ins s16imm64:$imm),
440 "li $rD, $imm", IIC_IntSimple,
441 [(set i64:$rD, imm64SExt16:$imm)]>;
442 def LIS8 : DForm_2_r0<15, (outs g8rc:$rD), (ins s17imm64:$imm),
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td272 def LDARX : XForm_1_memOp<31, 84, (outs g8rc:$rD), (ins memrr:$ptr),
273 "ldarx $rD, $ptr", IIC_LdStLDARX, []>;
277 def LDARXL : XForm_1<31, 84, (outs g8rc:$rD), (ins memrr:$ptr),
278 "ldarx $rD, $ptr, 1", IIC_LdStLDARX, []>, isRecordForm;
281 def LDAT : X_RD5_RS5_IM5<31, 614, (outs g8rc:$rD), (ins g8rc:$rA, u5imm:$FC),
282 "ldat $rD, $rA, $FC", IIC_LdStLoad>, isPPC64,
477 def LI8 : DForm_2_r0<14, (outs g8rc:$rD), (ins s16imm64:$imm),
478 "li $rD, $imm", IIC_IntSimple,
479 [(set i64:$rD, imm64SExt16:$imm)]>;
480 def LIS8 : DForm_2_r0<15, (outs g8rc:$rD), (ins s17imm64:$imm),
[all …]
/external/aac/libFDK/src/
DFDK_crc.cpp429 CCrcRegData *rD = &hCrcInfo->crcRegData[reg]; in crcCalc() local
435 -(rD->validBits - (INT)FDKgetValidBits(&bsReader))); in crcCalc()
439 FDKpushBiDirectional(&bsReader, rD->validBits); in crcCalc()
443 rBits = (rD->maxBits >= 0) ? rD->maxBits : -rD->maxBits; /* ramaining bits */ in crcCalc()
444 if ((rD->maxBits > 0) && ((rD->bitBufCntBits >> 3 << 3) < rBits)) { in crcCalc()
445 bits = rD->bitBufCntBits; in crcCalc()
/external/llvm-project/compiler-rt/lib/builtins/arm/
Dsync-ops.h48 #define MINMAX_4(rD, rN, rM, cmp_kind) \ argument
50 mov rD, rM; \
52 mov##cmp_kind rD, rN
Dsync_fetch_and_sub_4.S17 #define sub_4(rD, rN, rM) sub rD, rN, rM argument
Dsync_fetch_and_and_4.S16 #define and_4(rD, rN, rM) and rD, rN, rM argument
Dsync_fetch_and_or_4.S16 #define or_4(rD, rN, rM) orr rD, rN, rM argument
Dsync_fetch_and_add_4.S17 #define add_4(rD, rN, rM) add rD, rN, rM argument
Dsync_fetch_and_xor_4.S16 #define xor_4(rD, rN, rM) eor rD, rN, rM argument
Dsync_fetch_and_nand_4.S16 #define nand_4(rD, rN, rM) bic rD, rN, rM argument
Dsync_fetch_and_umin_4.S16 #define umin_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lo) argument
Dsync_fetch_and_min_4.S16 #define min_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lt) argument
/external/compiler-rt/lib/builtins/arm/
Dsync-ops.h51 #define MINMAX_4(rD, rN, rM, cmp_kind) \ argument
53 mov rD, rM ; \
55 mov##cmp_kind rD, rN
Dsync_fetch_and_xor_4.S17 #define xor_4(rD, rN, rM) eor rD, rN, rM argument
Dsync_fetch_and_add_4.S18 #define add_4(rD, rN, rM) add rD, rN, rM argument
Dsync_fetch_and_or_4.S17 #define or_4(rD, rN, rM) orr rD, rN, rM argument
Dsync_fetch_and_and_4.S17 #define and_4(rD, rN, rM) and rD, rN, rM argument
Dsync_fetch_and_sub_4.S18 #define sub_4(rD, rN, rM) sub rD, rN, rM argument
Dsync_fetch_and_nand_4.S17 #define nand_4(rD, rN, rM) bic rD, rN, rM argument
Dsync_fetch_and_umax_4.S17 #define umax_4(rD, rN, rM) MINMAX_4(rD, rN, rM, hi) argument
Dsync_fetch_and_min_4.S17 #define min_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lt) argument
Dsync_fetch_and_max_4.S17 #define max_4(rD, rN, rM) MINMAX_4(rD, rN, rM, gt) argument

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