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Searched refs:rN (Results 1 – 25 of 60) sorted by relevance

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/external/lzma/Asm/x86/
DXzCrc64Opt.asm11 rN equ r10 define
16 SRCDAT equ rN + rD
29 dec rN
36 mov rN, num_VAR
39 test rN, rN
47 cmp rN, 8
49 add rN, rD
50 mov num_VAR, rN
51 sub rN, 4
52 and rN, NOT 3
[all …]
D7zCrcOpt.asm9 rN equ r7 define
21 SRCDAT equ rN + rD + 4 *
42 dec rN
49 mov rN, num_VAR
51 test rN, rN
59 cmp rN, 16
61 add rN, rD
62 mov num_VAR, rN
63 sub rN, 8
64 and rN, NOT 7
[all …]
/external/llvm-project/compiler-rt/lib/builtins/arm/
Dsync-ops.h48 #define MINMAX_4(rD, rN, rM, cmp_kind) \ argument
49 cmp rN, rM; \
52 mov##cmp_kind rD, rN
Dsync_fetch_and_sub_4.S17 #define sub_4(rD, rN, rM) sub rD, rN, rM argument
Dsync_fetch_and_and_4.S16 #define and_4(rD, rN, rM) and rD, rN, rM argument
Dsync_fetch_and_or_4.S16 #define or_4(rD, rN, rM) orr rD, rN, rM argument
Dsync_fetch_and_add_4.S17 #define add_4(rD, rN, rM) add rD, rN, rM argument
Dsync_fetch_and_xor_4.S16 #define xor_4(rD, rN, rM) eor rD, rN, rM argument
Dsync_fetch_and_nand_4.S16 #define nand_4(rD, rN, rM) bic rD, rN, rM argument
Dsync_fetch_and_umin_4.S16 #define umin_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lo) argument
Dsync_fetch_and_min_4.S16 #define min_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lt) argument
Dsync_fetch_and_max_4.S16 #define max_4(rD, rN, rM) MINMAX_4(rD, rN, rM, gt) argument
Dsync_fetch_and_umax_4.S16 #define umax_4(rD, rN, rM) MINMAX_4(rD, rN, rM, hi) argument
/external/compiler-rt/lib/builtins/arm/
Dsync-ops.h51 #define MINMAX_4(rD, rN, rM, cmp_kind) \ argument
52 cmp rN, rM ; \
55 mov##cmp_kind rD, rN
Dsync_fetch_and_xor_4.S17 #define xor_4(rD, rN, rM) eor rD, rN, rM argument
Dsync_fetch_and_add_4.S18 #define add_4(rD, rN, rM) add rD, rN, rM argument
Dsync_fetch_and_or_4.S17 #define or_4(rD, rN, rM) orr rD, rN, rM argument
Dsync_fetch_and_and_4.S17 #define and_4(rD, rN, rM) and rD, rN, rM argument
Dsync_fetch_and_sub_4.S18 #define sub_4(rD, rN, rM) sub rD, rN, rM argument
Dsync_fetch_and_nand_4.S17 #define nand_4(rD, rN, rM) bic rD, rN, rM argument
Dsync_fetch_and_umax_4.S17 #define umax_4(rD, rN, rM) MINMAX_4(rD, rN, rM, hi) argument
Dsync_fetch_and_min_4.S17 #define min_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lt) argument
Dsync_fetch_and_max_4.S17 #define max_4(rD, rN, rM) MINMAX_4(rD, rN, rM, gt) argument
Dsync_fetch_and_umin_4.S17 #define umin_4(rD, rN, rM) MINMAX_4(rD, rN, rM, lo) argument
/external/mesa3d/src/freedreno/computerator/
DREADME.rst23 * ``@invocationid(rN.c)`` will populate a vec3 starting at the specified
25 * ``@wgid(rN.c)`` will populate a vec3 starting at the specified register

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