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Searched refs:ra_add_reg_conflict (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/util/
Dregister_allocate.c264 ra_add_reg_conflict(struct ra_regs *regs, unsigned int r1, unsigned int r2) in ra_add_reg_conflict() function
284 ra_add_reg_conflict(regs, reg, base_reg); in ra_add_transitive_reg_conflict()
288 ra_add_reg_conflict(regs, reg, *r2p); in ra_add_transitive_reg_conflict()
303 ra_add_reg_conflict(regs, reg0, base_reg); in ra_add_transitive_reg_pair_conflict()
304 ra_add_reg_conflict(regs, reg1, base_reg); in ra_add_transitive_reg_pair_conflict()
309 ra_add_reg_conflict(regs, reg0, conflict); in ra_add_transitive_reg_pair_conflict()
311 ra_add_reg_conflict(regs, reg1, conflict); in ra_add_transitive_reg_pair_conflict()
Dregister_allocate.h57 void ra_add_reg_conflict(struct ra_regs *regs,
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_compiler_nir_ra.c103 ra_add_reg_conflict(regs, NUM_REG_TYPES * r + i, in etna_ra_setup()
/external/mesa3d/src/intel/compiler/
Dbrw_vec4_reg_allocate.cpp141 ra_add_reg_conflict(compiler->vec4_reg_set.regs, base_reg, reg); in brw_vec4_alloc_reg_set()
Dbrw_fs_reg_allocate.cpp231 ra_add_reg_conflict(regs, base_reg, reg); in brw_alloc_reg_set()
245 ra_add_reg_conflict(regs, base_reg, reg); in brw_alloc_reg_set()
/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_pair_regalloc.c506 ra_add_reg_conflict(regs, in add_register_conflicts()
/external/mesa3d/src/gallium/drivers/lima/ir/pp/
Dregalloc.c113 ra_add_reg_conflict(ret, k * 4 + h, in ppir_regalloc_init()