Home
last modified time | relevance | path

Searched refs:ra_class_add_reg (Results 1 – 10 of 10) sorted by relevance

/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_register_allocate.c135 ra_class_add_reg(vc4->regs, vc4->reg_class_r0_r3, i); in vc4_alloc_reg_set()
136 ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc[0], i); in vc4_alloc_reg_set()
137 ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc[1], i); in vc4_alloc_reg_set()
144 ra_class_add_reg(vc4->regs, vc4->reg_class_r4_or_a[i], in vc4_alloc_reg_set()
146 ra_class_add_reg(vc4->regs, vc4->reg_class_any[i], in vc4_alloc_reg_set()
158 ra_class_add_reg(vc4->regs, vc4->reg_class_any[0], i); in vc4_alloc_reg_set()
159 ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b[0], i); in vc4_alloc_reg_set()
160 ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc[0], i); in vc4_alloc_reg_set()
163 ra_class_add_reg(vc4->regs, vc4->reg_class_any[1], i); in vc4_alloc_reg_set()
164 ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b[1], i); in vc4_alloc_reg_set()
[all …]
/external/mesa3d/src/freedreno/ir3/
Dir3_ra_regset.c137 ra_class_add_reg(set->regs, set->classes[i], reg); in ir3_ra_alloc_reg_set()
156 ra_class_add_reg(set->regs, set->half_classes[i], reg); in ir3_ra_alloc_reg_set()
175 ra_class_add_reg(set->regs, set->high_classes[i], reg); in ir3_ra_alloc_reg_set()
191 ra_class_add_reg(set->regs, set->prefetch_exclude_class, reg); in ir3_ra_alloc_reg_set()
/external/mesa3d/src/broadcom/compiler/
Dvir_register_allocate.c428 ra_class_add_reg(compiler->regs, in vir_init_reg_sets()
430 ra_class_add_reg(compiler->regs, in vir_init_reg_sets()
432 ra_class_add_reg(compiler->regs, in vir_init_reg_sets()
437 ra_class_add_reg(compiler->regs, in vir_init_reg_sets()
439 ra_class_add_reg(compiler->regs, in vir_init_reg_sets()
445 ra_class_add_reg(compiler->regs, in vir_init_reg_sets()
448 ra_class_add_reg(compiler->regs, in vir_init_reg_sets()
/external/mesa3d/src/util/
Dregister_allocate.h67 void ra_class_add_reg(struct ra_regs *regs, unsigned int c, unsigned int reg);
Dregister_allocate.c355 ra_class_add_reg(struct ra_regs *regs, unsigned int c, unsigned int r) in ra_class_add_reg() function
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_compiler_nir_ra.c97 ra_class_add_reg(regs, reg_get_class(r), r); in etna_ra_setup()
/external/mesa3d/src/intel/compiler/
Dbrw_fs_reg_allocate.cpp224 ra_class_add_reg(regs, classes[i], reg); in brw_alloc_reg_set()
238 ra_class_add_reg(regs, classes[i], reg); in brw_alloc_reg_set()
269 ra_class_add_reg(regs, aligned_bary_class, in brw_alloc_reg_set()
Dbrw_vec4_reg_allocate.cpp134 ra_class_add_reg(compiler->vec4_reg_set.regs, compiler->vec4_reg_set.classes[i], reg); in brw_vec4_alloc_reg_set()
/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_pair_regalloc.c709 ra_class_add_reg(s->regs, in rc_init_regalloc_state()
/external/mesa3d/src/gallium/drivers/lima/ir/pp/
Dregalloc.c130 ra_class_add_reg(ret, i, reg_index++); in ppir_regalloc_init()