Searched refs:ra_reg_count (Results 1 – 3 of 3) sorted by relevance
/external/mesa3d/src/freedreno/ir3/ |
D | ir3_ra_regset.c | 111 unsigned ra_reg_count, reg, base; in ir3_ra_alloc_reg_set() local 114 ra_reg_count = 0; in ir3_ra_alloc_reg_set() 116 ra_reg_count += CLASS_REGS(i); in ir3_ra_alloc_reg_set() 118 ra_reg_count += HALF_CLASS_REGS(i); in ir3_ra_alloc_reg_set() 120 ra_reg_count += HIGH_CLASS_REGS(i); in ir3_ra_alloc_reg_set() 122 ra_reg_count += 1; /* for tex-prefetch excludes */ in ir3_ra_alloc_reg_set() 125 set->regs = ra_alloc_reg_set(set, ra_reg_count, true); in ir3_ra_alloc_reg_set() 126 set->ra_reg_to_gpr = ralloc_array(set, uint16_t, ra_reg_count); in ir3_ra_alloc_reg_set()
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/external/mesa3d/src/intel/compiler/ |
D | brw_vec4_reg_allocate.cpp | 108 int ra_reg_count = 0; in brw_vec4_alloc_reg_set() local 110 ra_reg_count += base_reg_count - (class_sizes[i] - 1); in brw_vec4_alloc_reg_set() 114 compiler->vec4_reg_set.ra_reg_to_grf = ralloc_array(compiler, uint8_t, ra_reg_count); in brw_vec4_alloc_reg_set() 116 compiler->vec4_reg_set.regs = ra_alloc_reg_set(compiler, ra_reg_count, false); in brw_vec4_alloc_reg_set() 157 assert(reg == ra_reg_count); in brw_vec4_alloc_reg_set()
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D | brw_fs_reg_allocate.cpp | 126 int ra_reg_count = 0; in brw_alloc_reg_set() local 139 ra_reg_count += (base_reg_count - (class_sizes[i] - 1)) / 2; in brw_alloc_reg_set() 141 ra_reg_count += base_reg_count - (class_sizes[i] - 1); in brw_alloc_reg_set() 144 class_to_ra_reg_range[class_sizes[i]] = ra_reg_count; in brw_alloc_reg_set() 153 uint8_t *ra_reg_to_grf = ralloc_array(compiler, uint8_t, ra_reg_count); in brw_alloc_reg_set() 154 struct ra_regs *regs = ra_alloc_reg_set(compiler, ra_reg_count, false); in brw_alloc_reg_set() 252 assert(reg == ra_reg_count); in brw_alloc_reg_set()
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