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Searched refs:ralloc_array (Results 1 – 25 of 91) sorted by relevance

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/external/mesa3d/src/freedreno/ir3/
Dir3_ra_regset.c126 set->ra_reg_to_gpr = ralloc_array(set, uint16_t, ra_reg_count); in ir3_ra_alloc_reg_set()
127 set->gpr_to_ra_reg = ralloc_array(set, uint16_t *, total_class_count); in ir3_ra_alloc_reg_set()
134 set->gpr_to_ra_reg[i] = ralloc_array(set, uint16_t, CLASS_REGS(i)); in ir3_ra_alloc_reg_set()
153 ralloc_array(set, uint16_t, HALF_CLASS_REGS(i)); in ir3_ra_alloc_reg_set()
172 ralloc_array(set, uint16_t, HIGH_CLASS_REGS(i)); in ir3_ra_alloc_reg_set()
Dir3_context.c181 ralloc_array(ctx->def_ht, struct ir3_instruction *, n); in ir3_get_dst_ssa()
194 value = ralloc_array(ctx, struct ir3_instruction *, n); in ir3_get_dst()
221 ralloc_array(ctx, struct ir3_instruction *, num_components); in ir3_get_src()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_reorder_uniforms.c76 uint32_t *uniform_data = ralloc_array(c, uint32_t, next_uniform); in qir_reorder_uniforms()
78 ralloc_array(c, enum quniform_contents, next_uniform); in qir_reorder_uniforms()
Dvc4_opt_copy_propagation.c178 movs = ralloc_array(c, struct qinst *, c->num_temps); in qir_opt_copy_propagation()
/external/mesa3d/src/gallium/drivers/iris/
Diris_disk_cache.c192 ralloc_array(NULL, enum brw_param_builtin, num_system_values); in iris_disk_cache_retrieve()
202 ralloc_array(NULL, struct brw_shader_reloc, prog_data->num_relocs); in iris_disk_cache_retrieve()
213 prog_data->param = ralloc_array(NULL, uint32_t, prog_data->nr_params); in iris_disk_cache_retrieve()
/external/mesa3d/src/intel/compiler/
Dbrw_fs_live_variables.cpp278 start = ralloc_array(mem_ctx, int, num_vars); in fs_live_variables()
285 vgrf_start = ralloc_array(mem_ctx, int, num_vgrfs); in fs_live_variables()
286 vgrf_end = ralloc_array(mem_ctx, int, num_vgrfs); in fs_live_variables()
Dbrw_vec4_live_variables.cpp224 start = ralloc_array(mem_ctx, int, num_vars); in vec4_live_variables()
225 end = ralloc_array(mem_ctx, int, num_vars); in vec4_live_variables()
Dbrw_fs_reg_allocate.cpp153 uint8_t *ra_reg_to_grf = ralloc_array(compiler, uint8_t, ra_reg_count); in brw_alloc_reg_set()
157 int *classes = ralloc_array(compiler, int, class_count); in brw_alloc_reg_set()
163 unsigned int **q_values = ralloc_array(compiler, unsigned int *, in brw_alloc_reg_set()
166 q_values[i] = ralloc_array(q_values, unsigned int, class_count + 1); in brw_alloc_reg_set()
438 payload_last_use_ip = ralloc_array(mem_ctx, int, payload_node_count); in fs_reg_alloc()
Dbrw_fs_cse.cpp213 fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg, in create_copy_instr()
230 fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources); in create_copy_instr()
/external/mesa3d/src/compiler/nir/
Dnir_lower_point_size_mov.c49 in->state_slots = ralloc_array(in, nir_state_slot, 1); in lower_impl()
Dnir_phi_builder.c102 pb->blocks = ralloc_array(pb, nir_block *, pb->num_blocks); in nir_phi_builder_create()
111 pb->W = ralloc_array(pb, nir_block *, pb->num_blocks); in nir_phi_builder_create()
Dnir_lower_patch_vertices.c37 var->state_slots = ralloc_array(var, nir_state_slot, var->num_state_slots); in make_uniform()
Dnir_lower_regs_to_ssa.c223 state.values = ralloc_array(dead_ctx, struct nir_phi_builder_value *, in nir_lower_regs_to_ssa_impl()
229 BITSET_WORD *defs = ralloc_array(dead_ctx, BITSET_WORD, block_set_words); in nir_lower_regs_to_ssa_impl()
Dnir_lower_alpha_test.c103 var->state_slots = ralloc_array(var, nir_state_slot, 1); in nir_lower_alpha_test()
Dnir_lower_pntc_ytransform.c52 var->state_slots = ralloc_array(var, nir_state_slot, 1); in get_pntc_transform()
Dnir_clone.c139 nc->elements = ralloc_array(nvar, nir_constant *, c->num_elements); in nir_constant_clone()
160 nvar->state_slots = ralloc_array(nvar, nir_state_slot, var->num_state_slots); in nir_variable_clone()
172 nvar->members = ralloc_array(nvar, struct nir_variable_data, in nir_variable_clone()
726 nfxn->params = ralloc_array(state->ns, nir_parameter, fxn->num_params); in clone_function()
Dnir_split_per_member_structs.c72 ralloc_array(dead_ctx, nir_variable *, var->num_members); in split_variable()
/external/mesa3d/src/compiler/glsl/
Dgl_nir_link_uniform_blocks.c197 linked_block->Uniforms = ralloc_array(*linked_blocks, in link_cross_validate_uniform_block()
613 ralloc_array(linked, struct gl_uniform_block *, num_ubo_blocks); in gl_nir_link_uniform_blocks()
629 ralloc_array(linked, struct gl_uniform_block *, num_ssbo_blocks); in gl_nir_link_uniform_blocks()
Dir_clone.cpp282 …copy->subroutine_types = ralloc_array(mem_ctx, const struct glsl_type *, copy->num_subroutine_type… in clone()
365 c->const_elements = ralloc_array(c, ir_constant *, this->type->length); in clone()
/external/igt-gpu-tools/assembler/
Dralloc.h140 #define ralloc_array(ctx, type, count) \ macro
Dralloc.c306 ptr = ralloc_array(ctx, char, n + 1); in ralloc_strdup()
325 ptr = ralloc_array(ctx, char, n + 1); in ralloc_strndup()
/external/mesa3d/src/gallium/drivers/lima/ir/gp/
Dregalloc.c491 ctx.live = ralloc_array(ctx.mem_ctx, BITSET_WORD, ctx.bitset_words); in gpir_regalloc_prog()
492 ctx.worklist = ralloc_array(ctx.mem_ctx, unsigned, ctx.num_nodes_and_regs); in gpir_regalloc_prog()
493 ctx.stack = ralloc_array(ctx.mem_ctx, unsigned, ctx.num_nodes_and_regs); in gpir_regalloc_prog()
/external/mesa3d/src/util/
Dstring_buffer.c57 str->buf = ralloc_array(str, char, str->capacity); in _mesa_string_buffer_create()
Dregister_allocate.c386 regs->classes[b]->q = ralloc_array(regs, unsigned int, regs->class_count); in ra_set_finalize()
465 regs->classes = ralloc_array(regs->regs, struct ra_class *, class_count); in ra_set_deserialize()
472 class->regs = ralloc_array(class, BITSET_WORD, BITSET_WORDS(reg_count)); in ra_set_deserialize()
478 class->q = ralloc_array(regs->classes[c], unsigned int, class_count); in ra_set_deserialize()
/external/mesa3d/src/panfrost/util/
Dpan_liveness.c83 uint16_t *live = ralloc_array(blk, uint16_t, temp_count); in liveness_block_update()

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