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Searched refs:rdffr (Results 1 – 10 of 10) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-ffr-manipulation.ll11 define <vscale x 16 x i1> @rdffr() {
12 ; CHECK-LABEL: rdffr:
13 ; CHECK: rdffr p0.b
15 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr()
21 ; CHECK: rdffr p0.b, p0/z
23 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr.z(<vscale x 16 x i1> %pg)
51 declare <vscale x 16 x i1> @llvm.aarch64.sve.rdffr()
52 declare <vscale x 16 x i1> @llvm.aarch64.sve.rdffr.z(<vscale x 16 x i1>)
/external/llvm-project/llvm/test/MC/AArch64/SVE/
Drdffr.s10 rdffr p0.b label
16 rdffr p15.b label
22 rdffr p0.b, p0/z label
28 rdffr p15.b, p15/z label
Drdffr-diagnostics.s6 rdffr p0.h label
11 rdffr p0.s label
16 rdffr p0.d label
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td81 def RDFFR_PPz : sve_int_rdffr_pred<0b0, "rdffr">;
83 def RDFFR_P : sve_int_rdffr_unpred<"rdffr">;
/external/vixl/src/aarch64/
Dassembler-aarch64.h5159 void rdffr(const PRegisterWithLaneSize& pd);
5162 void rdffr(const PRegisterWithLaneSize& pd, const PRegisterZ& pg);
Dassembler-sve-aarch64.cc6191 void Assembler::rdffr(const PRegisterWithLaneSize& pd) { in rdffr() function in vixl::aarch64::Assembler
6201 void Assembler::rdffr(const PRegisterWithLaneSize& pd, const PRegisterZ& pg) { in rdffr() function in vixl::aarch64::Assembler
Dmacro-assembler-aarch64.h5557 rdffr(pd.VnB()); in Rdffr()
5562 rdffr(pd, pg); in Rdffr()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td273 defm RDFFR_PPz : sve_int_rdffr_pred<0b0, "rdffr", int_aarch64_sve_rdffr_z>;
275 defm RDFFR_P : sve_int_rdffr_unpred<"rdffr", int_aarch64_sve_rdffr>;
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc6215 COMPARE_PREFIX(rdffr(p13.VnB()), "rdffr p13.b"); in TEST()
6217 COMPARE_PREFIX(rdffr(p5.VnB(), p14.Zeroing()), "rdffr p5.b, p14/z"); in TEST()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc17009 …{ 3785 /* rdffr */, AArch64::RDFFR_P, Convert__SVEPredicateBReg1_0, AMFBS_HasSVE, { MCK_SVEPredica…
17010 …{ 3785 /* rdffr */, AArch64::RDFFR_PPz, Convert__SVEPredicateBReg1_0__SVEPredicateAnyReg1_1, AMFBS…
24382 …{ 3785 /* rdffr */, AArch64::RDFFR_P, Convert__SVEPredicateBReg1_0, AMFBS_HasSVE, { MCK_SVEPredica…
24383 …{ 3785 /* rdffr */, AArch64::RDFFR_PPz, Convert__SVEPredicateBReg1_0__SVEPredicateAnyReg1_1, AMFBS…
35875 { 3785 /* rdffr */, 1 /* 0 */, MCK_SVEPredicateBReg, AMFBS_HasSVE },
35876 { 3785 /* rdffr */, 1 /* 0 */, MCK_SVEPredicateBReg, AMFBS_HasSVE },
35877 { 3785 /* rdffr */, 1 /* 0 */, MCK_SVEPredicateBReg, AMFBS_HasSVE },
35878 { 3785 /* rdffr */, 2 /* 1 */, MCK_SVEPredicateAnyReg, AMFBS_HasSVE },
35879 { 3785 /* rdffr */, 1 /* 0 */, MCK_SVEPredicateBReg, AMFBS_HasSVE },
35880 { 3785 /* rdffr */, 2 /* 1 */, MCK_SVEPredicateAnyReg, AMFBS_HasSVE },