| /external/arm-trusted-firmware/services/std_svc/sdei/ |
| D | sdei_state.c | 25 #define reg_ (r_ | e_ | g_) macro
73 /* 0 */ [reg_] = { reG_, NOP_, X___, X___, X___, X___, X___, X___, X___, X___, },
76 /* 4 */ [Reg_] = { X___, X___, X___, X___, X___, X___, NOP_, reg_, reg_, X___, },
79 /* 1 */ [reG_] = { X___, X___, rEG_, NOP_, reg_, NOP_, X___, X___, X___, X___, },
85 /* 3 */ [rEG_] = { X___, X___, NOP_, reG_, reg_, X___, X___, X___, X___, REG_, },
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| /external/vixl/src/aarch64/ |
| D | operands-aarch64.cc | 150 reg_(NoReg), in Operand()
157 reg_(NoReg), in Operand()
163 : reg_(reg), in Operand()
175 : reg_(reg), in Operand()
188 bool Operand::IsImmediate() const { return reg_.Is(NoReg); } in IsImmediate()
192 return reg_.IsValid() && in IsPlainRegister()
209 return reg_.IsValid() && (shift_ != NO_SHIFT); in IsShiftedRegister()
214 return reg_.IsValid() && (extend_ != NO_EXTEND); in IsExtendedRegister()
230 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_); in ToExtendedRegister()
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| D | operands-aarch64.h | 349 return reg_; in GetRegister()
376 Register reg_; variable
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| /external/llvm-project/clang/test/Analysis/exploded-graph-rewriter/ |
| D | constraints_diff.dot | 22 { "symbol": "reg_$0<x>", "range": "{ [0, 10] }" }
33 // CHECK-SAME: <td align="left">reg_$0<x></td>
38 // CHECK-SAME: <td align="left">reg_$0<x></td>
60 { "symbol": "reg_$0<x>", "range": "{ [0, 5] }" }
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| D | constraints.dot | 6 // CHECK-SAME: <td align="left">reg_$0<x></td>
29 { "symbol": "reg_$0<x>", "range": "{ [0, 0] }" }
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.h | 771 uint32_t reg_; variable
774 explicit SpecialRegister(uint32_t reg) : reg_(reg) {} in SpecialRegister()
776 : reg_(reg) {} in SpecialRegister()
777 uint32_t GetReg() const { return reg_; } in GetReg()
779 bool Is(SpecialRegister value) const { return reg_ == value.reg_; } in Is()
780 bool Is(uint32_t value) const { return reg_ == value; } in Is()
781 bool IsNot(uint32_t value) const { return reg_ != value; } in IsNot()
825 uint32_t reg_; variable
828 explicit BankedRegister(unsigned reg) : reg_(reg) {} in BankedRegister()
830 : reg_(reg) {} in BankedRegister()
[all …]
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| D | instructions-aarch32.cc | 209 switch (reg_) { in GetName()
221 switch (reg_) { in GetName()
289 switch (reg_) { in GetName()
362 switch (reg_) { in GetName()
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| D | disasm-aarch32.h | 166 DRegister reg_; variable
171 : reg_(reg), index_(index) {} in IndexedRegisterPrinter()
172 DRegister GetReg() const { return reg_; } in GetReg()
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_ir.h | 421 : reg_(PhysReg{128}), isTemp_(false), isFixed_(true), isConstant_(false), in Operand()
610 return reg_; in physReg()
616 reg_ = reg; in setFixed()
626 return isConstant() && reg_ == 255; in isLiteral()
647 if (reg_ <= 192)
648 return reg_ - 128;
649 else if (reg_ <= 208)
650 return 0xFFFFFFFFFFFFFFFF - (reg_ - 193);
652 switch (reg_) {
755 PhysReg reg_; variable
[all …]
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| /external/skia/tools/fiddle/ |
| D | examples.h | 44 sk_tools::Registry<fiddle::Example> reg_##NAME( \
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| /external/google-breakpad/src/common/linux/ |
| D | breakpad_getcontext_unittest.cc | 124 offsetof(ucontext_t,uc_mcontext.gregs[REG_##x]), reg_##x) in TEST()
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| /external/elfutils/libdw/ |
| D | cfi.c | 124 fs->regs[regno].rule = reg_##r_rule; \ in execute_cfi()
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| /external/llvm-project/clang/docs/analyzer/developer-docs/ |
| D | DebugChecks.rst | 212 clang_analyzer_dump(x); // expected-warning{{reg_$0<x>}}
|