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Searched refs:reg_type (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_reg_type.c92 enum hw_reg_type reg_type; member
221 enum hw_3src_reg_type reg_type; member
320 assert(table[type].reg_type != (enum hw_reg_type)INVALID); in brw_reg_type_to_hw_type()
321 return table[type].reg_type; in brw_reg_type_to_hw_type()
358 if (table[i].reg_type == (enum hw_reg_type)hw_type) { in brw_hw_type_to_reg_type()
387 assert(table[type].reg_type != (enum hw_3src_reg_type)INVALID); in brw_reg_type_to_a16_hw_3src_type()
388 return table[type].reg_type; in brw_reg_type_to_a16_hw_3src_type()
401 return gen12_hw_3src_type[type].reg_type; in brw_reg_type_to_a1_hw_3src_type()
404 return gen11_hw_3src_type[type].reg_type; in brw_reg_type_to_a1_hw_3src_type()
407 return gen10_hw_3src_align1_type[type].reg_type; in brw_reg_type_to_a1_hw_3src_type()
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Dbrw_fs_nir.cpp369 const brw_reg_type reg_type = reg->bit_size == 8 ? BRW_REGISTER_TYPE_B : in nir_emit_impl() local
371 nir_locals[reg->index] = bld.vgrf(reg_type, size); in nir_emit_impl()
1928 const brw_reg_type reg_type = in nir_emit_load_const() local
1930 fs_reg reg = bld.vgrf(reg_type, instr->def.num_components); in nir_emit_load_const()
1975 const brw_reg_type reg_type = in get_nir_src() local
1977 reg = bld.vgrf(reg_type, src.ssa->num_components); in get_nir_src()
2024 const brw_reg_type reg_type = in get_nir_dest() local
2030 bld.vgrf(reg_type, dest.ssa.num_components); in get_nir_dest()
/external/deqp-deps/SPIRV-Tools/source/opt/
Dir_context.cpp799 analysis::Type* reg_type; in GetBuiltinInputVarId() local
805 reg_type = type_mgr->GetRegisteredType(&v4float_ty); in GetBuiltinInputVarId()
814 reg_type = type_mgr->GetRegisteredType(&uint_ty); in GetBuiltinInputVarId()
822 reg_type = type_mgr->GetRegisteredType(&v3uint_ty); in GetBuiltinInputVarId()
829 reg_type = type_mgr->GetRegisteredType(&v3float_ty); in GetBuiltinInputVarId()
836 reg_type = type_mgr->GetRegisteredType(&v4uint_ty); in GetBuiltinInputVarId()
844 uint32_t type_id = type_mgr->GetTypeInstruction(reg_type); in GetBuiltinInputVarId()
/external/swiftshader/third_party/SPIRV-Tools/source/opt/
Dir_context.cpp799 analysis::Type* reg_type; in GetBuiltinInputVarId() local
805 reg_type = type_mgr->GetRegisteredType(&v4float_ty); in GetBuiltinInputVarId()
814 reg_type = type_mgr->GetRegisteredType(&uint_ty); in GetBuiltinInputVarId()
822 reg_type = type_mgr->GetRegisteredType(&v3uint_ty); in GetBuiltinInputVarId()
829 reg_type = type_mgr->GetRegisteredType(&v3float_ty); in GetBuiltinInputVarId()
836 reg_type = type_mgr->GetRegisteredType(&v4uint_ty); in GetBuiltinInputVarId()
844 uint32_t type_id = type_mgr->GetTypeInstruction(reg_type); in GetBuiltinInputVarId()
/external/angle/third_party/vulkan-deps/spirv-tools/src/source/opt/
Dir_context.cpp795 analysis::Type* reg_type; in GetBuiltinInputVarId() local
801 reg_type = type_mgr->GetRegisteredType(&v4float_ty); in GetBuiltinInputVarId()
810 reg_type = type_mgr->GetRegisteredType(&uint_ty); in GetBuiltinInputVarId()
818 reg_type = type_mgr->GetRegisteredType(&v3uint_ty); in GetBuiltinInputVarId()
825 reg_type = type_mgr->GetRegisteredType(&v3float_ty); in GetBuiltinInputVarId()
832 reg_type = type_mgr->GetRegisteredType(&v4uint_ty); in GetBuiltinInputVarId()
840 uint32_t type_id = type_mgr->GetTypeInstruction(reg_type); in GetBuiltinInputVarId()
/external/mesa3d/src/intel/tools/
Di965_gram.y341 enum brw_reg_type reg_type; member
514 %type <reg_type> reg_type imm_type
1505 dstreg dstregion writemask reg_type
1519 dstoperandex_typed dstregion writemask reg_type
1531 | nullreg dstregion writemask reg_type
1638 directgenreg region reg_type
1667 | accreg region reg_type
1677 srcarcoperandex_typed region reg_type
1691 | nullreg region reg_type
1714 negate abs indirectgenreg indirectregion swizzle reg_type
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/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_flow.c146 LLVMBuildBitCast(builder, value, mask->reg_type, ""), in lp_build_mask_check()
147 LLVMConstNull(mask->reg_type), in lp_build_mask_check()
170 mask->reg_type = LLVMIntTypeInContext(gallivm->context, type.width * type.length); in lp_build_mask_begin()
Dlp_bld_ir_common.c279 LLVMTypeRef reg_type = LLVMIntTypeInContext(gallivm->context, in lp_exec_endloop() local
320 LLVMBuildBitCast(builder, mask->exec_mask, reg_type, ""), in lp_exec_endloop()
321 LLVMConstNull(reg_type), "i1cond"); in lp_exec_endloop()
Dlp_bld_flow.h75 LLVMTypeRef reg_type; member
/external/kernel-headers/original/uapi/rdma/
Di40iw-abi.h84 __u16 reg_type; /* Memory, QP or CQ */ member
/external/mesa3d/src/freedreno/ir3/
Dir3_shader.c489 const char *reg_type = (r & HALF_REG_ID) ? "hr" : "r"; in dump_reg() local
490 fprintf(out, "; %s: %s%d.%c\n", name, reg_type, in dump_reg()
591 const char *reg_type = so->outputs[i].half ? "hr" : "r"; in ir3_shader_disasm() local
593 reg_type, (regid >> 2), "xyzw"[regid & 0x3], in ir3_shader_disasm()
/external/iw/
Devent.c301 __u8 reg_type; in print_event() local
380 reg_type = nla_get_u8(tb[NL80211_ATTR_REG_TYPE]); in print_event()
382 switch (reg_type) { in print_event()
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_compiler_nir.h255 enum reg_type { enum
/external/arm-trusted-firmware/drivers/st/ddr/
Dstm32mp1_ddr.c202 enum reg_type { enum
299 enum reg_type type, in set_reg()
/external/vixl/src/aarch64/
Ddisasm-aarch64.cc9854 CPURegister::RegisterType reg_type = CPURegister::kRegister; in SubstituteRegisterField() local
9872 reg_type = CPURegister::kRegister; in SubstituteRegisterField()
9876 reg_type = CPURegister::kRegister; in SubstituteRegisterField()
9880 reg_type = CPURegister::kVRegister; in SubstituteRegisterField()
9884 reg_type = CPURegister::kVRegister; in SubstituteRegisterField()
9888 reg_type = CPURegister::kVRegister; in SubstituteRegisterField()
9892 reg_type = CPURegister::kVRegister; in SubstituteRegisterField()
9896 reg_type = CPURegister::kVRegister; in SubstituteRegisterField()
9901 reg_type = CPURegister::kVRegister; in SubstituteRegisterField()
9915 AppendRegisterNameToOutput(instr, CPURegister(reg_num, reg_size, reg_type)); in SubstituteRegisterField()
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/external/google-breakpad/src/third_party/libdisasm/swig/
Dlibdisasm.i25 %rename(reg_type) x86_reg_type;
/external/libusb/libusb/os/
Dwindows_winusb.c1249 DWORD size, reg_type; in get_api_type() local
1256 &reg_type, (PBYTE)lookup[k].list, MAX_KEY_LENGTH, &size)) { in get_api_type()
1385 DWORD size, port_nr, reg_type, install_state; in winusb_get_device_list() local
1559 s = pRegQueryValueExW(key, L"DeviceInterfaceGUIDs", NULL, &reg_type, in winusb_get_device_list()
1562 s = pRegQueryValueExW(key, L"DeviceInterfaceGUID", NULL, &reg_type, in winusb_get_device_list()
1566 (((reg_type == REG_SZ) && (size == (sizeof(guid_string_w) - sizeof(WCHAR)))) || in winusb_get_device_list()
1567 ((reg_type == REG_MULTI_SZ) && (size == sizeof(guid_string_w))))) { in winusb_get_device_list()
/external/wpa_supplicant_8/src/drivers/
Ddriver.h96 enum reg_type { enum
5884 enum reg_type type;
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp3208 RegType reg_type = RegType::sgpr; in emit_load() local
3211 reg_type = RegType::vgpr; in emit_load()
3220 tmp[0] = bld.tmp(RegClass::get(reg_type, tmp_size)); in emit_load()
3228 … RegClass new_rc = RegClass::get(reg_type, tmp[0].bytes() / component_size * component_size); in emit_load()
3232 RegClass elem_rc = RegClass::get(reg_type, component_size); in emit_load()
3859 Temp create_vec_from_array(isel_context *ctx, Temp arr[], unsigned cnt, RegType reg_type, unsigned … in create_vec_from_array() argument
3866 dst = bld.tmp(RegClass(reg_type, cnt * dword_size)); in create_vec_from_array()
3878 … Temp zero = bld.copy(bld.def(RegClass(reg_type, dword_size)), Operand(0u, dword_size == 2)); in create_vec_from_array()
/external/wpa_supplicant_8/wpa_supplicant/
Devents.c4149 static const char * reg_type_str(enum reg_type type) in reg_type_str()