Searched refs:reg_undef (Results 1 – 6 of 6) sorted by relevance
/external/mesa3d/src/intel/compiler/ |
D | brw_fs_visitor.cpp | 537 const fs_reg srcs[] = { reg_undef, reg_undef, in emit_fb_writes() 538 reg_undef, offset(this->outputs[0], bld, 3) }; in emit_fb_writes() 542 inst = emit_single_fb_write(bld, tmp, reg_undef, reg_undef, 4); in emit_fb_writes() 753 fs_inst *inst = abld.emit(opcode, reg_undef, payload); in emit_urb_writes() 791 fs_inst *inst = bld.emit(SHADER_OPCODE_URB_WRITE_SIMD8, reg_undef, payload); in emit_urb_writes() 835 reg_undef, payload); in emit_urb_writes() 860 .emit(CS_OPCODE_CS_TERMINATE, reg_undef, payload); in emit_cs_terminate() 897 bld.exec_all().emit(SHADER_OPCODE_BARRIER, reg_undef, payload); in emit_barrier()
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D | brw_fs_register_coalesce.cpp | 285 mov[i]->dst = reg_undef; in register_coalesce() 287 mov[i]->src[j] = reg_undef; in register_coalesce()
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D | brw_fs_cse.cpp | 279 entry->tmp = reg_undef; in opt_cse_local()
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D | brw_fs.cpp | 99 init(opcode, exec_size, reg_undef, NULL, 0); in fs_inst() 1593 inst = abld.emit(SHADER_OPCODE_URB_WRITE_SIMD8, reg_undef, hdr); in emit_gs_thread_end() 1601 inst = abld.emit(SHADER_OPCODE_URB_WRITE_SIMD8, reg_undef, payload); in emit_gs_thread_end() 2702 inst->src[1] = reg_undef; in opt_algebraic() 2711 inst->src[1] = reg_undef; in opt_algebraic() 2724 inst->src[1] = reg_undef; in opt_algebraic() 2733 inst->src[1] = reg_undef; in opt_algebraic() 2751 inst->src[1] = reg_undef; in opt_algebraic() 2793 inst->src[1] = reg_undef; in opt_algebraic() 2805 inst->src[1] = reg_undef; in opt_algebraic() [all …]
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D | brw_ir_fs.h | 322 static const fs_reg reg_undef; variable
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D | brw_fs_nir.cpp | 2258 fs_inst *inst = abld.emit(opcode, reg_undef, payload); in emit_gs_control_data_bits()
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