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/external/libvpx/libvpx/vpx_dsp/mips/
Didct16x16_msa.c332 v8i16 res8, res9, res10, res11, res12, res13, res14, res15; in vpx_iadst16_1d_columns_addblk_msa() local
456 ILVR_B2_SH(zero, dst10, zero, dst11, res10, res11); in vpx_iadst16_1d_columns_addblk_msa()
457 ADD2(res10, out10, res11, out11, res10, res11); in vpx_iadst16_1d_columns_addblk_msa()
458 CLIP_SH2_0_255(res10, res11); in vpx_iadst16_1d_columns_addblk_msa()
459 PCKEV_B2_SH(res10, res10, res11, res11, res10, res11); in vpx_iadst16_1d_columns_addblk_msa()
461 ST8x1_UB(res11, dst + 9 * dst_stride); in vpx_iadst16_1d_columns_addblk_msa()
/external/llvm-project/llvm/test/Analysis/CostModel/SystemZ/
Dlogical.ll15 %res11 = and <4 x i64> undef, undef
36 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res11 = and <4 x i64> undef, …
61 %res11 = ashr <4 x i64> undef, undef
82 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res11 = ashr <4 x i64> undef,…
107 %res11 = lshr <4 x i64> undef, undef
128 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res11 = lshr <4 x i64> undef,…
153 %res11 = or <4 x i64> undef, undef
174 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res11 = or <4 x i64> undef, u…
199 %res11 = shl <4 x i64> undef, undef
220 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res11 = shl <4 x i64> undef, …
[all …]
Dint-arith.ll18 %res11 = add <4 x i64> undef, undef
39 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res11 = add <4 x i64> undef, …
64 %res11 = sub <4 x i64> undef, undef
85 ; CHECK: Cost Model: Found an estimated cost of 2 for instruction: %res11 = sub <4 x i64> undef, …
110 %res11 = mul <4 x i64> undef, undef
131 ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %res11 = mul <4 x i64> undef, …
/external/llvm-project/llvm/test/Bitcode/
DmiscInstructions.3.2.ll105 ; CHECK-NEXT: %res11 = icmp eq i32* %ptr1, %ptr2
106 %res11 = icmp eq i32* %ptr1, %ptr2
147 ; CHECK-NEXT: %res11 = fcmp ord float %x1, %x2
148 %res11 = fcmp ord float %x1, %x2
DmemInstructions.3.2.ll60 ; CHECK-NEXT: %res11 = load i8, i8* %ptr1, align 1, !invariant.load !1
61 %res11 = load i8, i8* %ptr1, align 1, !invariant.load !1
116 ; CHECK-NEXT: %res11 = load atomic i8, i8* %ptr1 syncscope("singlethread") acquire, align 1
117 %res11 = load atomic i8, i8* %ptr1 syncscope("singlethread") acquire, align 1
270 ; CHECK-NEXT: %res11 = extractvalue { i32, i1 } [[TMP]], 0
271 %res11 = cmpxchg i32* %ptr, i32 %cmp, i32 %new syncscope("singlethread") release monotonic
/external/llvm/test/Bitcode/
DmiscInstructions.3.2.ll105 ; CHECK-NEXT: %res11 = icmp eq i32* %ptr1, %ptr2
106 %res11 = icmp eq i32* %ptr1, %ptr2
147 ; CHECK-NEXT: %res11 = fcmp ord float %x1, %x2
148 %res11 = fcmp ord float %x1, %x2
DmemInstructions.3.2.ll60 ; CHECK-NEXT: %res11 = load i8, i8* %ptr1, align 1, !invariant.load !1
61 %res11 = load i8, i8* %ptr1, align 1, !invariant.load !1
116 ; CHECK-NEXT: %res11 = load atomic i8, i8* %ptr1 singlethread acquire, align 1
117 %res11 = load atomic i8, i8* %ptr1 singlethread acquire, align 1
270 ; CHECK-NEXT: %res11 = extractvalue { i32, i1 } [[TMP]], 0
271 %res11 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
/external/clang/test/SemaCXX/
Daltivec.cpp30 int res11[vec_step(vui) == 4 ? 1 : -1]; in test_vec_step() local
/external/llvm-project/clang/test/SemaCXX/
Daltivec.cpp30 int res11[vec_step(vui) == 4 ? 1 : -1]; in test_vec_step() local
/external/swiftshader/third_party/subzero/crosstest/
Dtest_vector_ops_ll.ll169 %res11 = zext <16 x i1> %res11_i1 to <16 x i8>
170 ret <16 x i8> %res11
324 %res11 = insertelement <16 x i8> %vec, i8 %elt, i32 11
325 ret <16 x i8> %res11
513 %res11 = zext i1 %res11_i1 to i64
514 ret i64 %res11
689 %res11 = zext i8 %res11_i8 to i64
690 ret i64 %res11
/external/llvm-project/clang/test/SemaOpenCL/
Dvec_step.cl26 int res11[vec_step(int16) == 16 ? 1 : -1];
/external/clang/test/SemaOpenCL/
Dvec_step.cl26 int res11[vec_step(int16) == 16 ? 1 : -1];
/external/libaom/libaom/av1/common/arm/
Dwiener_convolve_neon.c83 uint16x8_t res5, res6, res7, res8, res9, res10, res11; in av1_wiener_convolve_add_src_neon() local
171 res11 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp, in av1_wiener_convolve_add_src_neon()
175 &res11); in av1_wiener_convolve_add_src_neon()
177 res10, res11); in av1_wiener_convolve_add_src_neon()
Djnt_convolve_neon.c1139 uint16x8_t res9, res10, res11; in av1_dist_wtd_convolve_x_neon() local
1226 load_u16_8x4(d_tmp, dst_stride, &res8, &res9, &res10, &res11); in av1_dist_wtd_convolve_x_neon()
1229 compute_avg_8x4(res8, res9, res10, res11, vreinterpretq_u16_s16(res0), in av1_dist_wtd_convolve_x_neon()
1239 load_u16_8x4(d_tmp, dst_stride, &res8, &res9, &res10, &res11); in av1_dist_wtd_convolve_x_neon()
1242 compute_avg_8x4(res8, res9, res10, res11, vreinterpretq_u16_s16(res4), in av1_dist_wtd_convolve_x_neon()
1574 uint16x8_t res10, res11, res9; in av1_dist_wtd_convolve_y_neon() local
1651 load_u16_8x4(d_tmp, dst_stride, &res8, &res9, &res10, &res11); in av1_dist_wtd_convolve_y_neon()
1654 compute_avg_8x4(res8, res9, res10, res11, vreinterpretq_u16_s16(res0), in av1_dist_wtd_convolve_y_neon()
1664 load_u16_8x4(d_tmp, dst_stride, &res8, &res9, &res10, &res11); in av1_dist_wtd_convolve_y_neon()
1667 compute_avg_8x4(res8, res9, res10, res11, vreinterpretq_u16_s16(res4), in av1_dist_wtd_convolve_y_neon()
/external/eigen/test/
Devaluators.cpp185 Matrix<float, 1, 1> m11, res11; m11.setRandom(1,1); in test_evaluators() local
195 VERIFY_IS_APPROX_EVALUATOR2(res11, prod(m11,m11), m11*m11); in test_evaluators()
196 VERIFY_IS_APPROX_EVALUATOR2(res11, prod(m14,m41), m14*m41); in test_evaluators()
197 VERIFY_IS_APPROX_EVALUATOR2(res11, prod(m1X,mX1), m1X*mX1); in test_evaluators()
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dint-sadd-08.ll256 %res11 = or i1 %res10, %obit11
260 %res12 = or i1 %res11, %obit12
388 %res11 = or i1 %res10, %obit11
392 %res12 = or i1 %res11, %obit12
Dint-sadd-09.ll256 %res11 = or i1 %res10, %obit11
260 %res12 = or i1 %res11, %obit12
388 %res11 = or i1 %res10, %obit11
392 %res12 = or i1 %res11, %obit12
Dint-ssub-09.ll256 %res11 = or i1 %res10, %obit11
260 %res12 = or i1 %res11, %obit12
388 %res11 = or i1 %res10, %obit11
392 %res12 = or i1 %res11, %obit12
Dint-usub-10.ll256 %res11 = or i1 %res10, %obit11
260 %res12 = or i1 %res11, %obit12
388 %res11 = or i1 %res10, %obit11
392 %res12 = or i1 %res11, %obit12
Dint-ssub-08.ll256 %res11 = or i1 %res10, %obit11
260 %res12 = or i1 %res11, %obit12
388 %res11 = or i1 %res10, %obit11
392 %res12 = or i1 %res11, %obit12
Dint-uadd-10.ll246 %res11 = or i1 %res10, %obit11
250 %res12 = or i1 %res11, %obit12
378 %res11 = or i1 %res10, %obit11
382 %res12 = or i1 %res11, %obit12
Dint-usub-11.ll257 %res11 = or i1 %res10, %obit11
261 %res12 = or i1 %res11, %obit12
Dint-uadd-11.ll247 %res11 = or i1 %res10, %obit11
251 %res12 = or i1 %res11, %obit12
/external/libvpx/libvpx/vpx_dsp/x86/
Dfwd_txfm_impl_sse2.h621 __m128i res08, res09, res10, res11, res12, res13, res14, res15; in FDCT16x16_2D() local
985 res11 = mult_round_shift(&t0, &t1, &k__cospi_m10_p22, in FDCT16x16_2D()
990 overflow = check_epi16_overflow_x4(&res05, &res13, &res11, &res03); in FDCT16x16_2D()
1001 transpose_and_output8x8(&res08, &res09, &res10, &res11, &res12, &res13, in FDCT16x16_2D()
/external/llvm-project/llvm/test/CodeGen/X86/
Davx-intrinsics-fast-isel.ll1555 %res11 = insertelement <32 x i8> %res10, i8 %a20, i32 11
1556 %res12 = insertelement <32 x i8> %res11, i8 %a19, i32 12
1659 %res11 = insertelement <16 x i16> %res10, i16 %a4 , i32 11
1660 %res12 = insertelement <16 x i16> %res11, i16 %a3 , i32 12
1868 %res11 = insertelement <32 x i8> %res10, i8 %a0, i32 11
1869 %res12 = insertelement <32 x i8> %res11, i8 %a0, i32 12
1921 %res11 = insertelement <16 x i16> %res10, i16 %a0, i32 11
1922 %res12 = insertelement <16 x i16> %res11, i16 %a0, i32 12
2171 %res11 = insertelement <32 x i8> %res10, i8 %a11, i32 11
2172 %res12 = insertelement <32 x i8> %res11, i8 %a12, i32 12
[all …]

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