Home
last modified time | relevance | path

Searched refs:res4 (Results 1 – 25 of 138) sorted by relevance

123456

/external/llvm-project/llvm/test/Bitcode/
DbinaryIntInstructions.3.2.ll19 ; CHECK-NEXT: %res4 = add i32 %x4, %x4
20 %res4 = add i32 %x4, %x4
48 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i8> %x4, %x4
49 %res4 = add nuw nsw <8 x i8> %x4, %x4
68 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i16> %x4, %x4
69 %res4 = add nuw nsw <8 x i16> %x4, %x4
88 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i32> %x4, %x4
89 %res4 = add nuw nsw <8 x i32> %x4, %x4
108 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i64> %x4, %x4
109 %res4 = add nuw nsw <8 x i64> %x4, %x4
[all …]
DbinaryFloatInstructions.3.2.ll19 ; CHECK-NEXT: %res4 = fadd fp128 %x4, %x4
20 %res4 = fadd fp128 %x4, %x4
42 ; CHECK-NEXT: %res4 = fadd <8 x float> %x4, %x4
43 %res4 = fadd <8 x float> %x4, %x4
62 ; CHECK-NEXT: %res4 = fadd <8 x double> %x4, %x4
63 %res4 = fadd <8 x double> %x4, %x4
82 ; CHECK-NEXT: %res4 = fadd <8 x half> %x4, %x4
83 %res4 = fadd <8 x half> %x4, %x4
DconstantsTest.3.2.ll33 ; CHECK-NEXT: %res4 = fadd float 0.000000e+00, 0.000000e+00
34 %res4 = fadd float 0.0, 0.0
54 ; CHECK-NEXT: %res4 = add <2 x i32> %x, zeroinitializer
55 %res4 = add <2 x i32> %x, zeroinitializer
/external/llvm/test/Bitcode/
DbinaryIntInstructions.3.2.ll19 ; CHECK-NEXT: %res4 = add i32 %x4, %x4
20 %res4 = add i32 %x4, %x4
48 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i8> %x4, %x4
49 %res4 = add nuw nsw <8 x i8> %x4, %x4
68 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i16> %x4, %x4
69 %res4 = add nuw nsw <8 x i16> %x4, %x4
88 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i32> %x4, %x4
89 %res4 = add nuw nsw <8 x i32> %x4, %x4
108 ; CHECK-NEXT: %res4 = add nuw nsw <8 x i64> %x4, %x4
109 %res4 = add nuw nsw <8 x i64> %x4, %x4
[all …]
DbinaryFloatInstructions.3.2.ll19 ; CHECK-NEXT: %res4 = fadd fp128 %x4, %x4
20 %res4 = fadd fp128 %x4, %x4
42 ; CHECK-NEXT: %res4 = fadd <8 x float> %x4, %x4
43 %res4 = fadd <8 x float> %x4, %x4
62 ; CHECK-NEXT: %res4 = fadd <8 x double> %x4, %x4
63 %res4 = fadd <8 x double> %x4, %x4
82 ; CHECK-NEXT: %res4 = fadd <8 x half> %x4, %x4
83 %res4 = fadd <8 x half> %x4, %x4
DconstantsTest.3.2.ll33 ; CHECK-NEXT: %res4 = fadd float 0.000000e+00, 0.000000e+00
34 %res4 = fadd float 0.0, 0.0
54 ; CHECK-NEXT: %res4 = add <2 x i32> %x, zeroinitializer
55 %res4 = add <2 x i32> %x, zeroinitializer
DaggregateInstructions.3.2.ll19 ; CHECK-NEXT: %res4 = extractvalue { { i32, float } } %x3, 0, 1
20 %res4 = extractvalue {{i32, float}} %x3, 0, 1
/external/llvm-project/libclc/generic/lib/math/
Datan2pi.cl182 double res1, res2, res3, res4;
188 res4 = yneg ? -q1 : q1;
194 res3 = isinf(y2) & isinf(x2) ? res3 : res4;
200 res4 = MATH_DIVIDE(MATH_DIVIDE(y, x), pi);
202 res3 = diffexp < -28 & xneg == 0 ? res4 : res3;
205 res4 = yneg ? -0.5 : 0.5; // atan(y/x) is insignificant compared to piby2
206 res3 = diffexp > 56 ? res4 : res3;
208 res3 = x2 == 0.0 ? res4 : res3; // Zero x gives +- pi/2 depending on sign of y
209 res4 = xneg ? res1 : y2;
211 res3 = y2 == 0.0 ? res4 : res3; // Zero y gives +-0 for positive x and +-pi for negative x
Datan2.cl199 double res1, res2, res3, res4;
205 res4 = yneg ? -q1 : q1;
211 res3 = isinf(x2) & isinf(y2) ? res3 : res4;
217 res4 = MATH_DIVIDE(y, x);
219 res3 = diffexp < -28 & xneg == 0 ? res4 : res3;
222 res4 = yneg ? -piby2 : piby2; // atan(y/x) is insignificant compared to piby2
223 res3 = diffexp > 56 ? res4 : res3;
225 res3 = x2 == 0.0 ? res4 : res3; // Zero x gives +- pi/2 depending on sign of y
226 res4 = xneg ? res1 : y2;
228 res3 = y2 == 0.0 ? res4 : res3; // Zero y gives +-0 for positive x and +-pi for negative x
/external/llvm-project/llvm/test/Analysis/CostModel/SystemZ/
Dlogic-miscext3.ll21 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res4 = xor i32 %c4, -1
22 ; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i32 %c4, -1
47 %res4 = xor i32 %c4, -1
48 store i32 %res4, i32* undef
68 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res4 = xor i64 %c4, -1
69 ; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i64 %c4, -1
93 %res4 = xor i64 %c4, -1
94 store i64 %res4, i64* undef
/external/llvm/test/CodeGen/X86/
Davx512vbmi-intrinsics.ll19 %res4 = add <64 x i8> %res3, %res2
20 ret <64 x i8> %res4
36 %res4 = add <64 x i8> %res3, %res2
37 ret <64 x i8> %res4
58 %res4 = add <64 x i8> %res3, %res2
59 ret <64 x i8> %res4
80 %res4 = add <64 x i8> %res3, %res2
81 ret <64 x i8> %res4
Davx512ifmavl-intrinsics.ll26 %res4 = add <2 x i64> %res, %res1
28 %res6 = add <2 x i64> %res5, %res4
54 %res4 = add <4 x i64> %res, %res1
56 %res6 = add <4 x i64> %res5, %res4
82 %res4 = add <2 x i64> %res, %res1
84 %res6 = add <2 x i64> %res5, %res4
110 %res4 = add <4 x i64> %res, %res1
112 %res6 = add <4 x i64> %res5, %res4
138 %res4 = add <2 x i64> %res, %res1
140 %res6 = add <2 x i64> %res5, %res4
[all …]
Davx512ifma-intrinsics.ll23 %res4 = add <8 x i64> %res, %res1
25 %res6 = add <8 x i64> %res5, %res4
49 %res4 = add <8 x i64> %res, %res1
51 %res6 = add <8 x i64> %res5, %res4
75 %res4 = add <8 x i64> %res, %res1
77 %res6 = add <8 x i64> %res5, %res4
101 %res4 = add <8 x i64> %res, %res1
103 %res6 = add <8 x i64> %res5, %res4
Davx512vbmivl-intrinsics.ll19 %res4 = add <16 x i8> %res3, %res2
20 ret <16 x i8> %res4
39 %res4 = add <32 x i8> %res3, %res2
40 ret <32 x i8> %res4
59 %res4 = add <16 x i8> %res3, %res2
60 ret <16 x i8> %res4
79 %res4 = add <32 x i8> %res3, %res2
80 ret <32 x i8> %res4
101 %res4 = add <16 x i8> %res3, %res2
102 ret <16 x i8> %res4
[all …]
Davx512-intrinsics-upgrade.ll21 %res4 = fadd <16 x float> %res2, %res3
22 ret <16 x float> %res4
42 %res4 = fadd <8 x double> %res2, %res3
43 ret <8 x double> %res4
62 %res4 = add <16 x i32> %res2, %res3
63 ret <16 x i32> %res4
82 %res4 = add <8 x i64> %res2, %res3
83 ret <8 x i64> %res4
102 %res4 = fadd <16 x float> %res2, %res3
103 ret <16 x float> %res4
[all …]
/external/icu/icu4c/source/test/intltest/
Dnmfmapts.cpp124 UnicodeString res1, res2, res3, res4, res5, res6; in testAPI() local
136 res4 = cur_fr->format(l, res4, pos2); in testAPI()
137 logln((UnicodeString) "" + (int32_t) l + " formatted to " + res4); in testAPI()
332 UnicodeString res0, res1, res2, res3, res4, res5; in testRegistration() local
341 f4->format(n, res4); in testRegistration()
352 logln((UnicodeString)"f4 reg int: " + res4); in testRegistration()
368 if (res4 != res1) { in testRegistration()
/external/libaom/libaom/av1/common/arm/
Djnt_convolve_neon.c443 int16x8_t res1, res2, res3, res4, res5, res6, res7; in dist_wtd_convolve_2d_horiz_neon() local
494 res4 = convolve8_8x8_s16(s4, s5, s6, s7, s8, s9, s10, s11, x_filter_tmp, in dist_wtd_convolve_2d_horiz_neon()
503 transpose_s16_8x8(&res0, &res1, &res2, &res3, &res4, &res5, &res6, in dist_wtd_convolve_2d_horiz_neon()
506 store_s16_8x8(d_tmp, dst_stride, res0, res1, res2, res3, res4, res5, in dist_wtd_convolve_2d_horiz_neon()
589 uint16x4_t res4, d0; in dist_wtd_convolve_2d_vert_neon() local
647 load_u16_4x4(d, dst_stride, &res4, &res5, &res6, &res7); in dist_wtd_convolve_2d_vert_neon()
650 compute_avg_4x4(res4, res5, res6, res7, d0, d1, d2, d3, fwd_offset, in dist_wtd_convolve_2d_vert_neon()
686 res4 = vld1_u16(d); in dist_wtd_convolve_2d_vert_neon()
689 compute_avg_4x1(res4, d0, fwd_offset, bck_offset, sub_const_vec, in dist_wtd_convolve_2d_vert_neon()
762 uint16x4_t tmp4, tmp5, tmp6, tmp7, res4, res5, res6, res7; in av1_dist_wtd_convolve_2d_copy_neon() local
[all …]
Dwiener_convolve_neon.c80 uint16x8_t res4; in av1_wiener_convolve_add_src_neon() local
122 res4 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp, in av1_wiener_convolve_add_src_neon()
174 transpose_u16_8x8(&res4, &res5, &res6, &res7, &res8, &res9, &res10, in av1_wiener_convolve_add_src_neon()
176 store_u16_8x8(d_tmp, MAX_SB_SIZE, res4, res5, res6, res7, res8, res9, in av1_wiener_convolve_add_src_neon()
226 res4 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp, in av1_wiener_convolve_add_src_neon()
229 vst1q_u16(d_tmp, res4); in av1_wiener_convolve_add_src_neon()
248 uint16x4_t res0, res1, res2, res3, res4, res5, res6, res7; in av1_wiener_convolve_add_src_neon() local
310 res4 = in av1_wiener_convolve_add_src_neon()
323 transpose_u16_4x8(&res0, &res1, &res2, &res3, &res4, &res5, &res6, in av1_wiener_convolve_add_src_neon()
/external/libvpx/libvpx/vpx_dsp/mips/
Didct16x16_msa.c267 v8i16 vec, res0, res1, res2, res3, res4, res5, res6, res7; in vpx_idct16x16_1_add_msa() local
278 UNPCK_UB_SH(dst0, res0, res4); in vpx_idct16x16_1_add_msa()
283 ADD4(res4, vec, res5, vec, res6, vec, res7, vec, res4, res5, res6, res7); in vpx_idct16x16_1_add_msa()
285 CLIP_SH4_0_255(res4, res5, res6, res7); in vpx_idct16x16_1_add_msa()
286 PCKEV_B4_UB(res4, res0, res5, res1, res6, res2, res7, res3, tmp0, tmp1, in vpx_idct16x16_1_add_msa()
331 v8i16 res0, res1, res2, res3, res4, res5, res6, res7; in vpx_iadst16_1d_columns_addblk_msa() local
420 ILVR_B2_SH(zero, dst4, zero, dst5, res4, res5); in vpx_iadst16_1d_columns_addblk_msa()
421 ADD2(res4, out4, res5, out5, res4, res5); in vpx_iadst16_1d_columns_addblk_msa()
422 CLIP_SH2_0_255(res4, res5); in vpx_iadst16_1d_columns_addblk_msa()
423 PCKEV_B2_SH(res4, res4, res5, res5, res4, res5); in vpx_iadst16_1d_columns_addblk_msa()
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Davx512-rotate.ll39 %res4 = add <16 x i32> %res3, %res2
40 ret <16 x i32> %res4
67 %res4 = add <8 x i64> %res3, %res2
68 ret <8 x i64> %res4
95 %res4 = add <16 x i32> %res3, %res2
96 ret <16 x i32> %res4
123 %res4 = add <8 x i64> %res3, %res2
124 ret <8 x i64> %res4
153 %res4 = add <16 x i32> %res3, %res2
154 ret <16 x i32> %res4
[all …]
Davx512-intrinsics-x86_64.ll131 %res4 = add i64 %res3, %res2
132 ret i64 %res4
150 %res4 = add i64 %res3, %res2
151 ret i64 %res4
169 %res4 = add i64 %res3, %res2
170 ret i64 %res4
188 %res4 = add i64 %res3, %res2
189 ret i64 %res4
/external/mesa3d/src/gallium/drivers/softpipe/
Dsp_quad_blend.c158 uint *res4 = (uint *) res; in logicop_quad() local
178 res4[j] = 0; in logicop_quad()
182 res4[j] = ~(src4[j] | dst4[j]); in logicop_quad()
186 res4[j] = ~src4[j] & dst4[j]; in logicop_quad()
190 res4[j] = ~src4[j]; in logicop_quad()
194 res4[j] = src4[j] & ~dst4[j]; in logicop_quad()
198 res4[j] = ~dst4[j]; in logicop_quad()
202 res4[j] = dst4[j] ^ src4[j]; in logicop_quad()
206 res4[j] = ~(src4[j] & dst4[j]); in logicop_quad()
210 res4[j] = src4[j] & dst4[j]; in logicop_quad()
[all …]
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/format/
DIntlTestNumberFormatAPI.java90 StringBuffer res4 = new StringBuffer(); in TestAPI() local
107 res4 = cur_fr.format(l, res4, pos2); in TestAPI()
108 logln("" + l + " formatted to " + res4); in TestAPI()
/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/format/
DIntlTestNumberFormatAPI.java93 StringBuffer res4 = new StringBuffer(); in TestAPI() local
110 res4 = cur_fr.format(l, res4, pos2); in TestAPI()
111 logln("" + l + " formatted to " + res4); in TestAPI()
/external/swiftshader/third_party/subzero/crosstest/
Dtest_vector_ops_ll.ll84 %res4 = zext <8 x i1> %res4_i1 to <8 x i16>
85 ret <8 x i16> %res4
141 %res4 = zext <16 x i1> %res4_i1 to <16 x i8>
142 ret <16 x i8> %res4
248 %res4 = insertelement <8 x i16> %vec, i16 %elt, i32 4
249 ret <8 x i16> %res4
303 %res4 = insertelement <16 x i8> %vec, i8 %elt, i32 4
304 ret <16 x i8> %res4
429 %res4 = zext i1 %res4_i1 to i64
430 ret i64 %res4
[all …]

123456