/external/tensorflow/tensorflow/compiler/xla/tests/ |
D | reverse_test.cc | 44 std::vector<int64> reversal; member 50 absl::StrJoin(reversal, "x"), use_bfloat16 ? "bf16" : "f32"); in ToTestCaseName() 91 Rev(a, spec.reversal); in TEST_P() 100 for (int64 dim : spec.reversal) { in TEST_P()
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/external/fonttools/Lib/fontTools/voltLib/ |
D | parser.py | 238 reversal = None 241 reversal = True 253 sub = self.parse_substitution_(reversal) 263 reversal, comments, context, sub, pos, location=location) 293 def parse_substitution_(self, reversal): argument 311 (reversal and (max_src > 1 or max_dest > 1))): 317 if reversal:
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D | ast.py | 233 direction, reversal, comments, context, sub, pos, argument 241 self.reversal = reversal 262 if self.reversal:
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/external/angle/extensions/ |
D | ANGLE_pack_reverse_row_order.txt | 54 ReadPixels. In some systems the GL can perform the row reversal during 137 …PACK_REVERSE_ROW_ORDER_ANGLE B GetIntegerv FALSE Pixel pack row order reversal 4.3… 155 /* Enable row order reversal */
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D | ANGLE_framebuffer_blit.txt | 158 direction, no reversal is required and the operation is supported.
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/external/tensorflow/tensorflow/core/api_def/base_api/ |
D | api_def_ReverseSequence.pbtxt | 31 The dimension along which reversal is performed.
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/external/llvm/test/CodeGen/X86/ |
D | 2007-11-30-LoadFolding-Bug.ll | 2 ; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | 2007-11-30-LoadFolding-Bug.ll | 2 ; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from
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/external/fonttools/Tests/voltLib/ |
D | parser_test.py | 837 (lookup.name, lookup.reversal), 861 (lookup.name, lookup.reversal),
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/external/lmfit/ |
D | CHANGELOG | 58 - correct memory leak introduced by reversal of mallock trick
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/external/icu/icu4c/source/data/translit/ |
D | ThaiLogical_Latin.txt | 19 # The insertion of spaces between words, the reversal of the vowels
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/external/llvm/test/Transforms/SimplifyCFG/ |
D | merge-cond-stores-2.ll | 6 ; This is a bit reversal that has been run through the early optimizer (-mem2reg -gvn -instcombine).
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/external/llvm-project/llvm/test/Analysis/DDG/ |
D | basic-b.ll | 75 ;; Loop-carried dependence requiring edge-reversal to expose a cycle
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/external/skia/src/gpu/effects/ |
D | GrRectBlurEffect.fp | 38 // The flip saves a reversal in the shader.
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/external/igt-gpu-tools/tools/ |
D | intel_reg_decode.c | 1733 const char *enable, *reversal, *width, *detected; in DEBUGSTRING() local 1736 reversal = (val & (1<<16)) ? "reversed" : "not reversed"; in DEBUGSTRING() 1755 return z_snprintf(result, len, "%s %s %s %s", enable, reversal, width, detected); in DEBUGSTRING()
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/external/tensorflow/tensorflow/compiler/mlir/hlo/include/mlir-hlo/Dialect/mhlo/IR/ |
D | hlo_ops_base.td | 1030 auto reversal = window_reversalAttr(); 1031 return reversal && llvm::any_of(reversal.getBoolValues(),
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/external/llvm-project/llvm/test/Transforms/SimplifyCFG/ |
D | merge-cond-stores-2.ll | 7 ; This is a bit reversal that has been run through the early optimizer (-mem2reg -gvn -instcombine).
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/external/llvm-project/clang/include/clang/Basic/ |
D | arm_neon_incl.td | 167 // rev - Perform a variable-width reversal of the elements. The zero'th argument
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/external/openssh/ |
D | PROTOCOL | 350 the reversal was not noticed until the server was widely deployed. Since
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding.s | 255 # Fixed-point load and store with byte reversal instructions
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/external/mesa3d/docs/_extra/specs/ |
D | MESA_shader_integer_functions.txt | 78 of one bits, and bitfield insertion, extraction, and reversal;
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/external/vboot_reference/scripts/image_signing/lib/shflags/ |
D | shflags | 270 # if/then/else contains just a ':' which does nothing. a binary reversal via
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64SchedCyclone.td | 149 // Bit counting and reversal operations.
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedCyclone.td | 148 // Bit counting and reversal operations.
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SchedCyclone.td | 147 // Bit counting and reversal operations.
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