/external/libwebsockets/lib/misc/ |
D | lws-ring.c | 32 struct lws_ring *ring = lws_malloc(sizeof(*ring), "ring create"); in lws_ring_create() local 34 if (!ring) in lws_ring_create() 37 ring->buflen = (uint32_t)(count * element_len); in lws_ring_create() 38 ring->element_len = (uint32_t)element_len; in lws_ring_create() 39 ring->head = 0; in lws_ring_create() 40 ring->oldest_tail = 0; in lws_ring_create() 41 ring->destroy_element = destroy_element; in lws_ring_create() 43 ring->buf = lws_malloc(ring->buflen, "ring buf"); in lws_ring_create() 44 if (!ring->buf) { in lws_ring_create() 45 lws_free(ring); in lws_ring_create() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
D | fd2_emit.c | 51 emit_constants(struct fd_ringbuffer *ring, uint32_t base, in emit_constants() argument 87 OUT_PKT3(ring, CP_SET_CONSTANT, size + 1); in emit_constants() 88 OUT_RING(ring, base); in emit_constants() 90 OUT_RING(ring, *(dwords++)); in emit_constants() 99 OUT_PKT3(ring, CP_SET_CONSTANT, 5); in emit_constants() 100 OUT_RING(ring, start_base + (4 * (shader->first_immediate + i))); in emit_constants() 101 OUT_RING(ring, shader->immediates[i].val[0]); in emit_constants() 102 OUT_RING(ring, shader->immediates[i].val[1]); in emit_constants() 103 OUT_RING(ring, shader->immediates[i].val[2]); in emit_constants() 104 OUT_RING(ring, shader->immediates[i].val[3]); in emit_constants() [all …]
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D | fd2_draw.c | 44 emit_cacheflush(struct fd_ringbuffer *ring) in emit_cacheflush() argument 49 OUT_PKT3(ring, CP_EVENT_WRITE, 1); in emit_cacheflush() 50 OUT_RING(ring, CACHE_FLUSH); in emit_cacheflush() 83 struct fd_ringbuffer *ring, unsigned index_offset, bool binning) in draw_impl() argument 85 OUT_PKT3(ring, CP_SET_CONSTANT, 2); in draw_impl() 86 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in draw_impl() 87 OUT_RING(ring, info->index_size ? 0 : info->start); in draw_impl() 89 OUT_PKT0(ring, REG_A2XX_TC_CNTL_STATUS, 1); in draw_impl() 90 OUT_RING(ring, A2XX_TC_CNTL_STATUS_L2_INVALIDATE); in draw_impl() 101 OUT_PKT3(ring, CP_WAIT_REG_EQ, 4); in draw_impl() [all …]
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D | fd2_gmem.c | 90 struct fd_ringbuffer *ring = batch->tile_fini; in emit_gmem2mem_surf() local 103 OUT_PKT3(ring, CP_SET_CONSTANT, 2); in emit_gmem2mem_surf() 104 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_INFO)); in emit_gmem2mem_surf() 105 OUT_RING(ring, A2XX_RB_COLOR_INFO_BASE(base) | in emit_gmem2mem_surf() 108 OUT_PKT3(ring, CP_SET_CONSTANT, 5); in emit_gmem2mem_surf() 109 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL)); in emit_gmem2mem_surf() 110 OUT_RING(ring, 0x00000000); /* RB_COPY_CONTROL */ in emit_gmem2mem_surf() 111 OUT_RELOC(ring, rsc->bo, offset, 0, 0); /* RB_COPY_DEST_BASE */ in emit_gmem2mem_surf() 112 OUT_RING(ring, pitch >> 5); /* RB_COPY_DEST_PITCH */ in emit_gmem2mem_surf() 113 OUT_RING(ring, /* RB_COPY_DEST_INFO */ in emit_gmem2mem_surf() [all …]
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/external/libdrm/freedreno/ |
D | freedreno_ringbuffer.c | 39 struct fd_ringbuffer *ring; in fd_ringbuffer_new_flags() local 48 ring = pipe->funcs->ringbuffer_new(pipe, size, flags); in fd_ringbuffer_new_flags() 49 if (!ring) in fd_ringbuffer_new_flags() 52 ring->flags = flags; in fd_ringbuffer_new_flags() 53 ring->pipe = pipe; in fd_ringbuffer_new_flags() 54 ring->start = ring->funcs->hostptr(ring); in fd_ringbuffer_new_flags() 55 ring->end = &(ring->start[ring->size/4]); in fd_ringbuffer_new_flags() 57 ring->cur = ring->last_start = ring->start; in fd_ringbuffer_new_flags() 59 return ring; in fd_ringbuffer_new_flags() 74 drm_public void fd_ringbuffer_del(struct fd_ringbuffer *ring) in fd_ringbuffer_del() argument [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_emit.c | 58 fd5_emit_const_user(struct fd_ringbuffer *ring, in fd5_emit_const_user() argument 62 emit_const_asserts(ring, v, regid, sizedwords); in fd5_emit_const_user() 64 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + sizedwords); in fd5_emit_const_user() 65 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd5_emit_const_user() 69 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd5_emit_const_user() 71 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); in fd5_emit_const_user() 73 OUT_RING(ring, ((uint32_t *)dwords)[i]); in fd5_emit_const_user() 77 fd5_emit_const_bo(struct fd_ringbuffer *ring, const struct ir3_shader_variant *v, in fd5_emit_const_bo() argument 85 emit_const_asserts(ring, v, regid, sizedwords); in fd5_emit_const_bo() 87 OUT_PKT7(ring, CP_LOAD_STATE4, 3); in fd5_emit_const_bo() [all …]
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D | fd5_gmem.c | 46 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 99 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5); in emit_mrt() 100 OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 105 OUT_RING(ring, A5XX_RB_MRT_PITCH(stride)); in emit_mrt() 106 OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(size)); in emit_mrt() 108 OUT_RING(ring, base); /* RB_MRT[i].BASE_LO */ in emit_mrt() 109 OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */ in emit_mrt() 112 OUT_RELOC(ring, rsc->bo, offset, 0, 0); /* BASE_LO/HI */ in emit_mrt() 115 OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1); in emit_mrt() 116 OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format) | in emit_mrt() [all …]
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D | fd5_emit.h | 105 fd5_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring) in fd5_cache_flush() argument 108 OUT_PKT4(ring, REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5); in fd5_cache_flush() 109 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_LO */ in fd5_cache_flush() 110 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_HI */ in fd5_cache_flush() 111 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_LO */ in fd5_cache_flush() 112 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_HI */ in fd5_cache_flush() 113 OUT_RING(ring, 0x00000012); /* UCHE_CACHE_INVALIDATE */ in fd5_cache_flush() 114 fd_wfi(batch, ring); in fd5_cache_flush() 118 fd5_set_render_mode(struct fd_context *ctx, struct fd_ringbuffer *ring, in fd5_set_render_mode() argument 122 emit_marker5(ring, 7); in fd5_set_render_mode() [all …]
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D | fd5_compute.c | 73 cs_program_emit(struct fd_ringbuffer *ring, struct ir3_shader_variant *v, in cs_program_emit() argument 96 OUT_PKT4(ring, REG_A5XX_SP_SP_CNTL, 1); in cs_program_emit() 97 OUT_RING(ring, 0x00000000); /* SP_SP_CNTL */ in cs_program_emit() 99 OUT_PKT4(ring, REG_A5XX_HLSQ_CONTROL_0_REG, 1); in cs_program_emit() 100 OUT_RING(ring, A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(TWO_QUADS) | in cs_program_emit() 104 OUT_PKT4(ring, REG_A5XX_SP_CS_CTRL_REG0, 1); in cs_program_emit() 105 OUT_RING(ring, A5XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 111 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONFIG, 1); in cs_program_emit() 112 OUT_RING(ring, A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(0) | in cs_program_emit() 116 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CNTL, 1); in cs_program_emit() [all …]
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D | fd5_draw.c | 44 draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring, in draw_impl() argument 50 fd5_emit_state(ctx, ring, emit); in draw_impl() 53 fd5_emit_vertex_bufs(ring, emit); in draw_impl() 55 OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); in draw_impl() 56 OUT_RING(ring, info->index_size ? info->index_bias : info->start); /* VFD_INDEX_OFFSET */ in draw_impl() 57 OUT_RING(ring, info->start_instance); /* VFD_INSTANCE_START_OFFSET */ in draw_impl() 59 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); in draw_impl() 60 OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */ in draw_impl() 64 fd5_draw_emit(ctx->batch, ring, primtype, in draw_impl() 160 struct fd_ringbuffer *ring = ctx->batch->draw; in fd5_draw_vbo() local [all …]
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D | fd5_blitter.c | 154 emit_setup(struct fd_ringbuffer *ring) in emit_setup() argument 156 OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); in emit_setup() 157 OUT_RING(ring, 0x00000008); in emit_setup() 159 OUT_PKT4(ring, REG_A5XX_UNKNOWN_2100, 1); in emit_setup() 160 OUT_RING(ring, 0x86000000); /* UNKNOWN_2100 */ in emit_setup() 162 OUT_PKT4(ring, REG_A5XX_UNKNOWN_2180, 1); in emit_setup() 163 OUT_RING(ring, 0x86000000); /* UNKNOWN_2180 */ in emit_setup() 165 OUT_PKT4(ring, REG_A5XX_UNKNOWN_2184, 1); in emit_setup() 166 OUT_RING(ring, 0x00000009); /* UNKNOWN_2184 */ in emit_setup() 168 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_setup() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
D | fd3_gmem.c | 45 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 108 OUT_PKT0(ring, REG_A3XX_RB_MRT_BUF_INFO(i), 2); in emit_mrt() 109 OUT_RING(ring, A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 115 OUT_RING(ring, A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(base)); in emit_mrt() 117 OUT_RELOC(ring, rsc->bo, offset, 0, -1); in emit_mrt() 120 OUT_PKT0(ring, REG_A3XX_SP_FS_IMAGE_OUTPUT_REG(i), 1); in emit_mrt() 121 OUT_RING(ring, COND((i < nr_bufs) && bufs[i], in emit_mrt() 165 struct fd_ringbuffer *ring = batch->gmem; in emit_binning_workaround() local 172 OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 2); in emit_binning_workaround() 173 OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RESOLVE_PASS) | in emit_binning_workaround() [all …]
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D | fd3_emit.c | 60 fd3_emit_const_user(struct fd_ringbuffer *ring, in fd3_emit_const_user() argument 64 emit_const_asserts(ring, v, regid, sizedwords); in fd3_emit_const_user() 66 OUT_PKT3(ring, CP_LOAD_STATE, 2 + sizedwords); in fd3_emit_const_user() 67 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | in fd3_emit_const_user() 71 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | in fd3_emit_const_user() 74 OUT_RING(ring, dwords[i]); in fd3_emit_const_user() 78 fd3_emit_const_bo(struct fd_ringbuffer *ring, const struct ir3_shader_variant *v, in fd3_emit_const_bo() argument 91 emit_const_asserts(ring, v, regid, sizedwords); in fd3_emit_const_bo() 93 OUT_PKT3(ring, CP_LOAD_STATE, 2); in fd3_emit_const_bo() 94 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(dst_off) | in fd3_emit_const_bo() [all …]
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/external/mesa3d/src/freedreno/drm/ |
D | freedreno_ringbuffer.h | 98 void (*grow)(struct fd_ringbuffer *ring, uint32_t size); 99 void (*emit_reloc)(struct fd_ringbuffer *ring, 101 uint32_t (*emit_reloc_ring)(struct fd_ringbuffer *ring, 103 uint32_t (*cmd_count)(struct fd_ringbuffer *ring); 104 void (*destroy)(struct fd_ringbuffer *ring); 128 fd_ringbuffer_del(struct fd_ringbuffer *ring) in fd_ringbuffer_del() argument 130 if (--ring->refcnt > 0) in fd_ringbuffer_del() 133 ring->funcs->destroy(ring); in fd_ringbuffer_del() 138 fd_ringbuffer_ref(struct fd_ringbuffer *ring) in fd_ringbuffer_ref() argument 140 ring->refcnt++; in fd_ringbuffer_ref() [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_emit.c | 55 fd4_emit_const_user(struct fd_ringbuffer *ring, in fd4_emit_const_user() argument 59 emit_const_asserts(ring, v, regid, sizedwords); in fd4_emit_const_user() 61 OUT_PKT3(ring, CP_LOAD_STATE4, 2 + sizedwords); in fd4_emit_const_user() 62 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(regid/4) | in fd4_emit_const_user() 66 OUT_RING(ring, CP_LOAD_STATE4_1_EXT_SRC_ADDR(0) | in fd4_emit_const_user() 69 OUT_RING(ring, dwords[i]); in fd4_emit_const_user() 73 fd4_emit_const_bo(struct fd_ringbuffer *ring, const struct ir3_shader_variant *v, in fd4_emit_const_bo() argument 82 emit_const_asserts(ring, v, regid, sizedwords); in fd4_emit_const_bo() 84 OUT_PKT3(ring, CP_LOAD_STATE4, 2); in fd4_emit_const_bo() 85 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(dst_off) | in fd4_emit_const_bo() [all …]
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D | fd4_gmem.c | 46 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, in emit_mrt() argument 110 OUT_PKT0(ring, REG_A4XX_RB_MRT_BUF_INFO(i), 3); in emit_mrt() 111 OUT_RING(ring, A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | in emit_mrt() 117 OUT_RING(ring, base); in emit_mrt() 118 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(stride)); in emit_mrt() 120 OUT_RELOC(ring, rsc->bo, offset, 0, 0); in emit_mrt() 125 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(0)); in emit_mrt() 150 struct fd_ringbuffer *ring = batch->gmem; in emit_gmem2mem_surf() local 170 OUT_PKT0(ring, REG_A4XX_RB_COPY_CONTROL, 4); in emit_gmem2mem_surf() 171 OUT_RING(ring, A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | in emit_gmem2mem_surf() [all …]
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/external/skqp/src/compute/skc/ |
D | extent_ring.c | 23 skc_extent_ring_init(struct skc_extent_ring * const ring, in skc_extent_ring_init() argument 28 ring->head = NULL; in skc_extent_ring_init() 29 ring->last = NULL; in skc_extent_ring_init() 31 ring->outer.rw = (skc_uint2){ 0 }; in skc_extent_ring_init() 32 ring->inner.rw = (skc_uint2){ 0 }; in skc_extent_ring_init() 36 ring->size.pow2 = size_pow2; in skc_extent_ring_init() 37 ring->size.mask = size_pow2 - 1; in skc_extent_ring_init() 38 ring->size.snap = size_snap; in skc_extent_ring_init() 39 ring->size.elem = size_elem; in skc_extent_ring_init() 47 skc_extent_ring_rem(struct skc_extent_ring const * const ring) in skc_extent_ring_rem() argument [all …]
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/external/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
D | fd6_gmem.c | 57 fd6_emit_flag_reference(struct fd_ringbuffer *ring, struct fd_resource *rsc, in fd6_emit_flag_reference() argument 61 OUT_RELOC(ring, rsc->bo, fd_resource_ubwc_offset(rsc, level, layer), 0, 0); in fd6_emit_flag_reference() 62 OUT_RING(ring, in fd6_emit_flag_reference() 66 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */ in fd6_emit_flag_reference() 67 OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */ in fd6_emit_flag_reference() 68 OUT_RING(ring, 0x00000000); in fd6_emit_flag_reference() 73 emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb, in emit_mrt() argument 123 OUT_REG(ring, in emit_mrt() 133 OUT_REG(ring, in emit_mrt() 137 OUT_PKT4(ring, REG_A6XX_RB_MRT_FLAG_BUFFER(i), 3); in emit_mrt() [all …]
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D | fd6_blitter.c | 237 struct fd_ringbuffer *ring = batch->draw; in emit_setup() local 240 fd6_event_write(batch, ring, PC_CCU_FLUSH_COLOR_TS, true); in emit_setup() 241 fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true); in emit_setup() 242 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false); in emit_setup() 243 fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false); in emit_setup() 246 OUT_WFI5(ring); in emit_setup() 247 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1); in emit_setup() 248 OUT_RING(ring, A6XX_RB_CCU_CNTL_OFFSET(screen->info.a6xx.ccu_offset_bypass)); in emit_setup() 252 emit_blit_setup(struct fd_ringbuffer *ring, in emit_blit_setup() argument 259 OUT_PKT7(ring, CP_SET_MARKER, 1); in emit_blit_setup() [all …]
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D | fd6_program.c | 45 fd6_emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so) in fd6_emit_shader() argument 95 fd_emit_string5(ring, name, strlen(name)); in fd6_emit_shader() 98 OUT_PKT4(ring, instrlen, 1); in fd6_emit_shader() 99 OUT_RING(ring, so->instrlen); in fd6_emit_shader() 101 OUT_PKT4(ring, obj_start, 2); in fd6_emit_shader() 102 OUT_RELOC(ring, so->bo, 0, 0, 0); in fd6_emit_shader() 104 OUT_PKT7(ring, fd6_stage2opcode(so->type), 3); in fd6_emit_shader() 105 OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) | in fd6_emit_shader() 110 OUT_RELOC(ring, so->bo, 0, 0, 0); in fd6_emit_shader() 210 struct fd_ringbuffer *ring = state->streamout_stateobj; in setup_stream_out() local [all …]
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D | fd6_compute.c | 77 cs_program_emit(struct fd_ringbuffer *ring, struct ir3_shader_variant *v) in cs_program_emit() argument 82 OUT_REG(ring, A6XX_HLSQ_INVALIDATE_CMD( in cs_program_emit() 93 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL, 1); in cs_program_emit() 94 OUT_RING(ring, A6XX_HLSQ_CS_CNTL_CONSTLEN(v->constlen) | in cs_program_emit() 97 OUT_PKT4(ring, REG_A6XX_SP_CS_CONFIG, 2); in cs_program_emit() 98 OUT_RING(ring, A6XX_SP_CS_CONFIG_ENABLED | in cs_program_emit() 103 OUT_RING(ring, v->instrlen); /* SP_VS_INSTRLEN */ in cs_program_emit() 105 OUT_PKT4(ring, REG_A6XX_SP_CS_CTRL_REG0, 1); in cs_program_emit() 106 OUT_RING(ring, A6XX_SP_CS_CTRL_REG0_THREADSIZE(thrsz) | in cs_program_emit() 113 OUT_PKT4(ring, REG_A6XX_SP_CS_UNKNOWN_A9B1, 1); in cs_program_emit() [all …]
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D | fd6_query.c | 65 struct fd_ringbuffer *ring = batch->draw; in occlusion_resume() local 67 OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_CONTROL, 1); in occlusion_resume() 68 OUT_RING(ring, A6XX_RB_SAMPLE_COUNT_CONTROL_COPY); in occlusion_resume() 70 OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_ADDR_LO, 2); in occlusion_resume() 71 OUT_RELOC(ring, query_sample(aq, start)); in occlusion_resume() 73 fd6_event_write(batch, ring, ZPASS_DONE, false); in occlusion_resume() 81 struct fd_ringbuffer *ring = batch->draw; in occlusion_pause() local 83 OUT_PKT7(ring, CP_MEM_WRITE, 4); in occlusion_pause() 84 OUT_RELOC(ring, query_sample(aq, stop)); in occlusion_pause() 85 OUT_RING(ring, 0xffffffff); in occlusion_pause() [all …]
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/external/mesa3d/src/freedreno/computerator/ |
D | a6xx.c | 113 cs_program_emit(struct fd_ringbuffer *ring, struct kernel *kernel) in cs_program_emit() argument 120 OUT_PKT4(ring, REG_A6XX_SP_MODE_CONTROL, 1); in cs_program_emit() 121 OUT_RING(ring, A6XX_SP_MODE_CONTROL_CONSTANT_DEMOTION_ENABLE | 4); in cs_program_emit() 123 OUT_PKT4(ring, REG_A6XX_HLSQ_INVALIDATE_CMD, 1); in cs_program_emit() 124 OUT_RING(ring, A6XX_HLSQ_INVALIDATE_CMD_VS_STATE | in cs_program_emit() 134 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL, 1); in cs_program_emit() 135 OUT_RING(ring, A6XX_HLSQ_CS_CNTL_CONSTLEN(constlen) | in cs_program_emit() 138 OUT_PKT4(ring, REG_A6XX_SP_CS_CONFIG, 2); in cs_program_emit() 139 OUT_RING(ring, A6XX_SP_CS_CONFIG_ENABLED | in cs_program_emit() 143 OUT_RING(ring, v->instrlen); /* SP_VS_INSTRLEN */ in cs_program_emit() [all …]
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/external/linux-kselftest/tools/testing/selftests/net/ |
D | psock_tpacket.c | 69 struct ring { struct 74 void (*walk)(int sock, struct ring *ring); argument 223 static void walk_v1_v2_rx(int sock, struct ring *ring) in walk_v1_v2_rx() argument 230 bug_on(ring->type != PACKET_RX_RING); in walk_v1_v2_rx() 242 while (__v1_v2_rx_kernel_ready(ring->rd[frame_num].iov_base, in walk_v1_v2_rx() 243 ring->version)) { in walk_v1_v2_rx() 244 ppd.raw = ring->rd[frame_num].iov_base; in walk_v1_v2_rx() 246 switch (ring->version) { in walk_v1_v2_rx() 263 __v1_v2_rx_user_ready(ppd.raw, ring->version); in walk_v1_v2_rx() 265 frame_num = (frame_num + 1) % ring->rd_num; in walk_v1_v2_rx() [all …]
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/external/android-clat/ |
D | ring.c | 52 struct packet_ring *ring = &tunnel->ring; in ring_create() local 53 ring->numblocks = TP_NUM_BLOCKS; in ring_create() 55 int total_frames = TP_FRAMES * ring->numblocks; in ring_create() 60 .tp_block_nr = ring->numblocks, // Number of blocks. in ring_create() 69 size_t buflen = TP_BLOCK_SIZE * ring->numblocks; in ring_create() 70 ring->base = mmap(NULL, buflen, PROT_READ | PROT_WRITE, MAP_SHARED | MAP_LOCKED | MAP_POPULATE, in ring_create() 72 if (ring->base == MAP_FAILED) { in ring_create() 77 ring->block = 0; in ring_create() 78 ring->slot = 0; in ring_create() 79 ring->numslots = TP_BLOCK_SIZE / TP_FRAME_SIZE; in ring_create() [all …]
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