| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.4a-flag-error.s | 7 rmif x1, #64, #15
8 rmif x1, #-1, #15
9 rmif x1, #63, #16
10 rmif x1, #63, #-1
11 rmif sp, #63, #1
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| D | armv8.4a-flag.s | 22 rmif x1, #63, #15
23 rmif xzr, #63, #15
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-flag.txt | 11 #CHECK: rmif x1, #63, #15
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 396 TEST(rmif) { in TEST() argument
399 COMPARE(rmif(x0, 3, ZCVFlag), "rmif x0, #3, #nZCV"); in TEST()
400 COMPARE(rmif(x1, 63, NCFlag), "rmif x1, #63, #NzCv"); in TEST()
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| D | test-cpu-features-aarch64.cc | 2810 TEST_FLAGM(rmif_0, rmif(x0, 52, NVFlag))
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| D | test-assembler-aarch64.cc | 5435 TEST(rmif) { in TEST() argument
|
| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 1919 rmif(xn, shift, flags); in Rmif()
|
| D | assembler-aarch64.h | 680 void rmif(const Register& xn, unsigned rotation, StatusFlags flags);
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| D | assembler-aarch64.cc | 549 void Assembler::rmif(const Register& xn, unsigned rotation, StatusFlags flags) { in rmif() function in vixl::aarch64::Assembler
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2270 void rmif(const Register& xn, unsigned rotation, StatusFlags flags)
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 1072 def RMIF : FlagRotate<(ins GPR64:$Rn, uimm6:$imm, imm0_15:$mask), "rmif",
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 932 def RMIF : FlagRotate<(ins GPR64:$Rn, uimm6:$imm, imm0_15:$mask), "rmif",
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12553 "rev64\004revb\004revh\004revw\004rmif\003ror\004rorv\005rshrn\006rshrn2"
17049 …{ 3856 /* rmif */, AArch64::RMIF, Convert__Reg1_0__UImm61_1__Imm0_151_2, AMFBS_HasFMI, { MCK_GPR64…
24422 { 3856 /* rmif */, AArch64::RMIF, Convert__imm_95_0__imm_95_0__imm_95_0, AMFBS_HasFMI, { }, },
|