| /external/llvm-project/libcxx/test/std/numerics/bit/bitops.rot/ |
| D | rotr.pass.cpp | 33 return std::rotr(T(128), 0) == T(128) in constexpr_test()
34 && std::rotr(T(128), 1) == T( 64) in constexpr_test()
35 && std::rotr(T(128), 2) == T( 32) in constexpr_test()
36 && std::rotr(T(128), 3) == T( 16) in constexpr_test()
37 && std::rotr(T(128), 4) == T( 8) in constexpr_test()
38 && std::rotr(T(128), 5) == T( 4) in constexpr_test()
39 && std::rotr(T(128), 6) == T( 2) in constexpr_test()
40 && std::rotr(T(128), 7) == T( 1) in constexpr_test()
41 && std::rotr(max, 0) == max in constexpr_test()
42 && std::rotr(max, 1) == max in constexpr_test()
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | bswap.ll | 14 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
18 ; MM: rotr ${{[0-9]+}}, $[[R0]], 16
22 ; MIPS64: rotr ${{[0-9]+}}, $[[R0]], 16
45 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
47 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
51 ; MM: rotr ${{[0-9]+}}, $[[R0]], 16
53 ; MM: rotr ${{[0-9]+}}, $[[R0]], 16
89 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
91 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
93 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
[all …]
|
| D | rotate.ll | 22 ; CHECK: rotr $2, $4, 22
24 ; MM32: rotr $2, $4, 22
45 ; CHECK: rotr $2, $4, 10
47 ; MM32: rotr $2, $4, 10
|
| /external/llvm/test/MC/Mips/ |
| D | rotations32.s | 25 # CHECK-32R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
28 # CHECK-32R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
33 # CHECK-32R: rotr $4, $4, 31 # encoding: [0x00,0x24,0x27,0xc2]
38 # CHECK-32R: rotr $4, $5, 31 # encoding: [0x00,0x25,0x27,0xc2]
43 # CHECK-32R: rotr $4, $4, 30 # encoding: [0x00,0x24,0x27,0x82]
48 # CHECK-32R: rotr $4, $5, 30 # encoding: [0x00,0x25,0x27,0x82]
64 # CHECK-32R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
67 # CHECK-32R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
72 # CHECK-32R: rotr $4, $4, 1 # encoding: [0x00,0x24,0x20,0x42]
77 # CHECK-32R: rotr $4, $5, 1 # encoding: [0x00,0x25,0x20,0x42]
[all …]
|
| D | set-mips0-directive.s | 5 rotr $7, $7, 22
10 rotr $2, $2, 15
15 rotr $3, $3, 19
17 # CHECK: rotr $7, $7, 22
22 # CHECK: rotr $2, $2, 15
27 # CHECK: rotr $3, $3, 19
|
| D | set-mips-directives.s | 19 rotr $2,15
22 rotr $2,15
25 rotr $2,15
55 # CHECK: rotr $2, $2, 15
58 # CHECK: rotr $2, $2, 15
61 # CHECK: rotr $2, $2, 15
|
| D | rotations64.s | 25 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
28 # CHECK-64R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
33 # CHECK-64R: rotr $4, $4, 31 # encoding: [0x00,0x24,0x27,0xc2]
38 # CHECK-64R: rotr $4, $5, 31 # encoding: [0x00,0x25,0x27,0xc2]
43 # CHECK-64R: rotr $4, $4, 30 # encoding: [0x00,0x24,0x27,0x82]
48 # CHECK-64R: rotr $4, $5, 30 # encoding: [0x00,0x25,0x27,0x82]
64 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
67 # CHECK-64R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
72 # CHECK-64R: rotr $4, $4, 1 # encoding: [0x00,0x24,0x20,0x42]
77 # CHECK-64R: rotr $4, $5, 1 # encoding: [0x00,0x25,0x20,0x42]
[all …]
|
| D | set-arch.s | 18 rotr $2, $2, 15
21 rotr $2, $2, 15
24 rotr $2, $2, 15
57 # CHECK: rotr $2, $2, 15
|
| D | micromips-shift-instructions.s | 16 # CHECK-EL: rotr $9, $6, 7 # encoding: [0x26,0x01,0xc0,0x38]
36 # CHECK-EB: rotr $9, $6, 7 # encoding: [0x01,0x26,0x38,0xc0]
53 rotr $9, $6, 7
|
| /external/llvm-project/llvm/test/MC/Mips/ |
| D | rotations32.s | 25 # CHECK-32R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
28 # CHECK-32R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
33 # CHECK-32R: rotr $4, $4, 31 # encoding: [0x00,0x24,0x27,0xc2]
38 # CHECK-32R: rotr $4, $5, 31 # encoding: [0x00,0x25,0x27,0xc2]
43 # CHECK-32R: rotr $4, $4, 30 # encoding: [0x00,0x24,0x27,0x82]
48 # CHECK-32R: rotr $4, $5, 30 # encoding: [0x00,0x25,0x27,0x82]
64 # CHECK-32R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
67 # CHECK-32R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
72 # CHECK-32R: rotr $4, $4, 1 # encoding: [0x00,0x24,0x20,0x42]
77 # CHECK-32R: rotr $4, $5, 1 # encoding: [0x00,0x25,0x20,0x42]
[all …]
|
| D | set-mips0-directive.s | 5 rotr $7, $7, 22
10 rotr $2, $2, 15
15 rotr $3, $3, 19
17 # CHECK: rotr $7, $7, 22
22 # CHECK: rotr $2, $2, 15
27 # CHECK: rotr $3, $3, 19
|
| D | set-mips-directives.s | 19 rotr $2,15
22 rotr $2,15
25 rotr $2,15
55 # CHECK: rotr $2, $2, 15
58 # CHECK: rotr $2, $2, 15
61 # CHECK: rotr $2, $2, 15
|
| D | rotations64.s | 25 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
28 # CHECK-64R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
33 # CHECK-64R: rotr $4, $4, 31 # encoding: [0x00,0x24,0x27,0xc2]
38 # CHECK-64R: rotr $4, $5, 31 # encoding: [0x00,0x25,0x27,0xc2]
43 # CHECK-64R: rotr $4, $4, 30 # encoding: [0x00,0x24,0x27,0x82]
48 # CHECK-64R: rotr $4, $5, 30 # encoding: [0x00,0x25,0x27,0x82]
64 # CHECK-64R: rotr $4, $4, 0 # encoding: [0x00,0x24,0x20,0x02]
67 # CHECK-64R: rotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x02]
72 # CHECK-64R: rotr $4, $4, 1 # encoding: [0x00,0x24,0x20,0x42]
77 # CHECK-64R: rotr $4, $5, 1 # encoding: [0x00,0x25,0x20,0x42]
[all …]
|
| D | set-arch.s | 18 rotr $2, $2, 15
21 rotr $2, $2, 15
24 rotr $2, $2, 15
59 # CHECK: rotr $2, $2, 15
|
| D | micromips-shift-instructions.s | 16 # CHECK-EL: rotr $9, $6, 7 # encoding: [0x26,0x01,0xc0,0x38]
36 # CHECK-EB: rotr $9, $6, 7 # encoding: [0x01,0x26,0x38,0xc0]
53 rotr $9, $6, 7
|
| /external/angle/third_party/abseil-cpp/absl/numeric/ |
| D | bits_test.cc | 67 static_assert(rotr(uint8_t{0x12}, 0) == uint8_t{0x12}, ""); in TEST()
68 static_assert(rotr(uint16_t{0x1234}, 0) == uint16_t{0x1234}, ""); in TEST()
69 static_assert(rotr(uint32_t{0x12345678UL}, 0) == uint32_t{0x12345678UL}, ""); in TEST()
70 static_assert(rotr(uint64_t{0x12345678ABCDEF01ULL}, 0) == in TEST()
74 EXPECT_EQ(rotr(uint8_t{0x12}, 0), uint8_t{0x12}); in TEST()
75 EXPECT_EQ(rotr(uint16_t{0x1234}, 0), uint16_t{0x1234}); in TEST()
76 EXPECT_EQ(rotr(uint32_t{0x12345678UL}, 0), uint32_t{0x12345678UL}); in TEST()
77 EXPECT_EQ(rotr(uint64_t{0x12345678ABCDEF01ULL}, 0), in TEST()
80 EXPECT_EQ(rotr(uint8_t{0x12}, 8), uint8_t{0x12}); in TEST()
81 EXPECT_EQ(rotr(uint16_t{0x1234}, 16), uint16_t{0x1234}); in TEST()
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | bswap.ll | 9 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
13 ; MIPS64: rotr ${{[0-9]+}}, $[[R0]], 16
36 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
38 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
76 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
78 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
80 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
82 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
86 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
88 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
[all …]
|
| D | rotate.ll | 22 ; CHECK: rotr $2, $4, 22
24 ; MM32: rotr $2, $4, 22
45 ; CHECK: rotr $2, $4, 10
47 ; MM32: rotr $2, $4, 10
|
| /external/rust/crates/ring/src/digest/ |
| D | sha2.rs | 126 x.rotr(S::BIG_SIGMA_0.0) ^ x.rotr(S::BIG_SIGMA_0.1) ^ x.rotr(S::BIG_SIGMA_0.2) in SIGMA_0()
132 x.rotr(S::BIG_SIGMA_1.0) ^ x.rotr(S::BIG_SIGMA_1.1) ^ x.rotr(S::BIG_SIGMA_1.2) in SIGMA_1()
138 x.rotr(S::SMALL_SIGMA_0.0) ^ x.rotr(S::SMALL_SIGMA_0.1) ^ (x >> S::SMALL_SIGMA_0.2) in sigma_0()
144 x.rotr(S::SMALL_SIGMA_1.0) ^ x.rotr(S::SMALL_SIGMA_1.1) ^ (x >> S::SMALL_SIGMA_1.2) in sigma_1()
164 fn rotr(self, count: u32) -> Self; in rotr() method
190 fn rotr(self, count: u32) -> Self { in rotr() method
282 fn rotr(self, count: u32) -> Self { in rotr() method
|
| /external/wpa_supplicant_8/src/crypto/ |
| D | aes_i.h | 70 static inline u32 rotr(u32 val, int bits) in rotr() function
76 #define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
77 #define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
78 #define TE3(i) rotr(Te0[(i) & 0xff], 24)
94 #define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
95 #define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
96 #define TD3(i) rotr(Td0[(i) & 0xff], 24)
102 #define TD1_(i) rotr(Td0[(i) & 0xff], 8)
103 #define TD2_(i) rotr(Td0[(i) & 0xff], 16)
104 #define TD3_(i) rotr(Td0[(i) & 0xff], 24)
|
| /external/llvm-project/llvm/test/TableGen/ |
| D | SetTheory.td | 115 // The 'rotr' operator rotates right, but also accepts a negative shift.
116 def rotr;
117 def S7a : Set<(rotr S0f, 0)>;
118 def S7b : Set<(rotr S0f, 1)>;
119 def S7c : Set<(rotr S0f, 3)>;
120 def S7d : Set<(rotr S0f, 4)>;
121 def S7e : Set<(rotr S0f, 5)>;
122 def S7f : Set<(rotr S0f, -1)>;
123 def S7g : Set<(rotr S0f, -4)>;
124 def S7h : Set<(rotr S0f, -5)>;
|
| /external/llvm/test/TableGen/ |
| D | SetTheory.td | 115 // The 'rotr' operator rotates right, but also accepts a negative shift.
116 def rotr;
117 def S7a : Set<(rotr S0f, 0)>;
118 def S7b : Set<(rotr S0f, 1)>;
119 def S7c : Set<(rotr S0f, 3)>;
120 def S7d : Set<(rotr S0f, 4)>;
121 def S7e : Set<(rotr S0f, 5)>;
122 def S7f : Set<(rotr S0f, -1)>;
123 def S7g : Set<(rotr S0f, -4)>;
124 def S7h : Set<(rotr S0f, -5)>;
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | ror.ll | 4 ; rotr (rotr x, 4), 6 -> rotr x, 10 -> ror r0, r0, #10
|
| /external/webrtc/third_party/abseil-cpp/absl/random/internal/ |
| D | fastmath.h | 63 inline constexpr uint32_t rotr(uint32_t value, uint8_t bits) { in rotr() function
66 inline constexpr uint64_t rotr(uint64_t value, uint8_t bits) { in rotr() function
|
| /external/openscreen/third_party/abseil/src/absl/random/internal/ |
| D | fastmath.h | 63 inline constexpr uint32_t rotr(uint32_t value, uint8_t bits) { in rotr() function
66 inline constexpr uint64_t rotr(uint64_t value, uint8_t bits) { in rotr() function
|