| /external/llvm-project/llvm/test/MC/ARM/ |
| D | arm-shift-encoding.s | 10 ldr r0, [r0, r0, rrx]
20 @ CHECK: ldr r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x90,0xe7]
30 pld [r0, r0, rrx]
40 @ CHECK: [r0, r0, rrx] @ encoding: [0x60,0xf0,0xd0,0xf7]
50 str r0, [r0, r0, rrx]
60 @ CHECK: str r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x80,0xe7]
68 ldr r0, [r1], r2, rrx
73 @ CHECK: ldr r0, [r1], r2, rrx @ encoding: [0x62,0x00,0x91,0xe6]
88 adc r7, r2, r12, rrx
98 @ CHECK: adc r7, r2, r12, rrx @ encoding: [0x6c,0x70,0xa2,0xe0]
[all …]
|
| D | thumb-shift-encoding.s | 14 sbc.w r7, r2, r12, rrx
24 @ CHECK: sbc.w r7, r2, r12, rrx @ encoding: [0x62,0xeb,0x3c,0x07]
34 and.w r7, r2, r12, rrx
44 @ CHECK: and.w r7, r2, r12, rrx @ encoding: [0x02,0xea,0x3c,0x07]
|
| D | basic-arm-instructions.s | 86 adc r4, r5, r6, rrx
100 adc r4, r5, rrx
105 adc r4, r5, rrx
124 @ CHECK: adc r4, r5, r6, rrx @ encoding: [0x66,0x40,0xa5,0xe0]
137 @ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0]
142 @ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0]
205 add r4, r5, r6, rrx
229 add r4, r5, rrx
261 @ CHECK: add r4, r5, r6, rrx @ encoding: [0x66,0x40,0x85,0xe0]
284 @ CHECK: add r4, r4, r5, rrx @ encoding: [0x65,0x40,0x84,0xe0]
[all …]
|
| /external/llvm/test/MC/ARM/ |
| D | arm-shift-encoding.s | 10 ldr r0, [r0, r0, rrx]
20 @ CHECK: ldr r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x90,0xe7]
30 pld [r0, r0, rrx]
40 @ CHECK: [r0, r0, rrx] @ encoding: [0x60,0xf0,0xd0,0xf7]
50 str r0, [r0, r0, rrx]
60 @ CHECK: str r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x80,0xe7]
68 ldr r0, [r1], r2, rrx
73 @ CHECK: ldr r0, [r1], r2, rrx @ encoding: [0x62,0x00,0x91,0xe6]
88 adc r7, r2, r12, rrx
98 @ CHECK: adc r7, r2, r12, rrx @ encoding: [0x6c,0x70,0xa2,0xe0]
[all …]
|
| D | thumb-shift-encoding.s | 14 sbc.w r7, r2, r12, rrx
24 @ CHECK: sbc.w r7, r2, r12, rrx @ encoding: [0x62,0xeb,0x3c,0x07]
34 and.w r7, r2, r12, rrx
44 @ CHECK: and.w r7, r2, r12, rrx @ encoding: [0x02,0xea,0x3c,0x07]
|
| D | basic-arm-instructions.s | 86 adc r4, r5, r6, rrx
100 adc r4, r5, rrx
105 adc r4, r5, rrx
124 @ CHECK: adc r4, r5, r6, rrx @ encoding: [0x66,0x40,0xa5,0xe0]
137 @ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0]
142 @ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0]
205 add r4, r5, r6, rrx
229 add r4, r5, rrx
261 @ CHECK: add r4, r5, r6, rrx @ encoding: [0x66,0x40,0x85,0xe0]
284 @ CHECK: add r4, r4, r5, rrx @ encoding: [0x65,0x40,0x84,0xe0]
[all …]
|
| /external/capstone/suite/MC/ARM/ |
| D | arm-shift-encoding.s.cs | 9 0x60,0x00,0x90,0xe7 = ldr r0, [r0, r0, rrx]
18 0x60,0xf0,0xd0,0xf7 = pld [r0, r0, rrx]
27 0x60,0x00,0x80,0xe7 = str r0, [r0, r0, rrx]
29 0x62,0x00,0x91,0xe6 = ldr r0, [r1], r2, rrx
40 0x6c,0x70,0xa2,0xe0 = adc r7, r2, r12, rrx
49 0x62,0x00,0x57,0xe1 = cmp r7, r2, rrx
|
| D | thumb-shift-encoding.s.cs | 9 0x62,0xeb,0x3c,0x07 = sbc.w r7, r2, r12, rrx
18 0x02,0xea,0x3c,0x07 = and.w r7, r2, r12, rrx
|
| D | basic-arm-instructions.s.cs | 29 0x66,0x40,0xa5,0xe0 = adc r4, r5, r6, rrx
41 0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx
46 0x65,0x40,0xa4,0xe0 = adc r4, r4, r5, rrx
59 0x66,0x40,0x85,0xe0 = add r4, r5, r6, rrx
71 0x65,0x40,0x84,0xe0 = add r4, r4, r5, rrx
87 0x66,0xa0,0x01,0xe0 = and r10, r1, r6, rrx
100 0x61,0xa0,0x0a,0xe0 = and r10, r10, r1, rrx
122 0x66,0xa0,0xc1,0xe1 = bic r10, r1, r6, rrx
134 0x61,0xa0,0xca,0xe1 = bic r10, r10, r1, rrx
166 0x66,0x00,0x71,0xe1 = cmn r1, r6, rrx
[all …]
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-lsr3.ll | 6 ; CHECK: rrx r0, r0
15 ; CHECK: rrx r0, r0
|
| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-lsr3.ll | 6 ; CHECK: rrx r0, r0
15 ; CHECK: rrx r0, r0
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-basic-instructions.s | 40 adc r4, r5, r6, rrx
52 adc r4, r4, r5, rrx
57 adc r4, r4, r5, rrx
71 add r4, r5, r6, rrx
83 add r4, r4, r5, rrx
106 and r10, r1, r6, rrx
118 and r10, r10, r1, rrx
136 bic r10, r1, r6, rrx
149 bic r10, r10, r1, rrx
176 cmn r1, r6, rrx
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | long_shift.ll | 7 ; CHECK-LE-NEXT: rrx r2, r2
11 ; CHECK-BE-NEXT: rrx r3, r3
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2-bit-15.txt | 88 # CHECK: rrx r4, r4
91 # CHECK: rrx r4, r4
|
| D | basic-arm-instructions.txt | 60 # CHECK: adc r4, r5, r6, rrx
73 # CHECK: adc r4, r4, r5, rrx
78 # CHECK: adc r4, r4, r5, rrx
133 # CHECK: add r4, r5, r6, rrx
146 # CHECK: add r4, r4, r5, rrx
217 # CHECK: and r10, r1, r6, rrx
230 # CHECK: and r10, r10, r1, rrx
300 # CHECK: bic r10, r1, r6, rrx
313 # CHECK: bic r10, r10, r1, rrx
435 # CHECK: cmn r1, r6, rrx
[all …]
|
| D | arm-tests.txt | 108 # CHECK-NOT: orr r7, r8, r7, rrx #0
109 # CHECK: orr r7, r8, r7, rrx
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 60 # CHECK: adc r4, r5, r6, rrx
73 # CHECK: adc r4, r4, r5, rrx
78 # CHECK: adc r4, r4, r5, rrx
133 # CHECK: add r4, r5, r6, rrx
146 # CHECK: add r4, r4, r5, rrx
217 # CHECK: and r10, r1, r6, rrx
230 # CHECK: and r10, r10, r1, rrx
300 # CHECK: bic r10, r1, r6, rrx
313 # CHECK: bic r10, r10, r1, rrx
435 # CHECK: cmn r1, r6, rrx
[all …]
|
| D | arm-tests.txt | 108 # CHECK-NOT: orr r7, r8, r7, rrx #0
109 # CHECK: orr r7, r8, r7, rrx
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | long_shift.ll | 9 ; CHECK-LE-NEXT: rrx r2, r2
17 ; CHECK-BE-NEXT: rrx r3, r3
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 33 rrx, enumerator
51 case ARM_AM::rrx: return "rrx"; in getShiftOpcStr()
|
| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 33 rrx, enumerator
51 case ARM_AM::rrx: return "rrx"; in getShiftOpcStr()
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 33 rrx enumerator
52 case ARM_AM::rrx: return "rrx"; in getShiftOpcStr()
|
| D | ARMMCCodeEmitter.cpp | 212 case ARM_AM::rrx: return 3; in getShiftOp()
1394 case ARM_AM::rrx: in getSORegImmOpValue()
1496 case ARM_AM::rrx: // FALLTHROUGH in getT2SORegOpValue()
1501 if (SOpc == ARM_AM::rrx) in getT2SORegOpValue()
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/ |
| D | cmsis_armcc.h | 589 rrx r0, r0 in __RRX()
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/ |
| D | cmsis_armcc.h | 589 rrx r0, r0 in __RRX()
|