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Searched refs:rsubhn (Results 1 – 25 of 40) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Darm64-vsub.ll66 ;CHECK: rsubhn.8b
69 %tmp3 = call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
75 ;CHECK: rsubhn.4h
78 %tmp3 = call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
84 ;CHECK: rsubhn.2s
87 %tmp3 = call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
93 ;CHECK: rsubhn.8b
95 …%vrsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a, <8 x i16> %b) nounwi…
96 …%vrsubhn_high2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a, <8 x i16> %b) n…
103 ;CHECK: rsubhn.4h
[all …]
Darm64-vecFold.ll111 ; CHECK: rsubhn.8b v0, v0, v1
114 …%vrsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a0, <8 x i16> %a1) noun…
115 …%vrsubhn2.i10 = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %b0, <8 x i16> %b1) no…
144 declare <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
Darm64-neon-3vdiff.ll41 declare <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64>, <2 x i64>)
43 declare <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32>, <4 x i32>)
45 declare <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16>, <8 x i16>)
955 ; CHECK: rsubhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
957 %vrsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a, <8 x i16> %b)
963 ; CHECK: rsubhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
965 %vrsubhn2.i = tail call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> %a, <4 x i32> %b)
971 ; CHECK: rsubhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
973 %vrsubhn2.i = tail call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> %a, <2 x i64> %b)
979 ; CHECK: rsubhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Darm64-vsub.ll66 ;CHECK: rsubhn.8b
69 %tmp3 = call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
75 ;CHECK: rsubhn.4h
78 %tmp3 = call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
84 ;CHECK: rsubhn.2s
87 %tmp3 = call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
93 ;CHECK: rsubhn.8b
95 …%vrsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a, <8 x i16> %b) nounwi…
96 …%vrsubhn_high2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a, <8 x i16> %b) n…
103 ;CHECK: rsubhn.4h
[all …]
Darm64-vecFold.ll111 ; CHECK: rsubhn.8b v0, v0, v1
114 …%vrsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a0, <8 x i16> %a1) noun…
115 …%vrsubhn2.i10 = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %b0, <8 x i16> %b1) no…
144 declare <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
Darm64-neon-3vdiff.ll41 declare <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64>, <2 x i64>)
43 declare <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32>, <4 x i32>)
45 declare <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16>, <8 x i16>)
955 ; CHECK: rsubhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
957 %vrsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.rsubhn.v8i8(<8 x i16> %a, <8 x i16> %b)
963 ; CHECK: rsubhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
965 %vrsubhn2.i = tail call <4 x i16> @llvm.aarch64.neon.rsubhn.v4i16(<4 x i32> %a, <4 x i32> %b)
971 ; CHECK: rsubhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
973 %vrsubhn2.i = tail call <2 x i32> @llvm.aarch64.neon.rsubhn.v2i32(<2 x i64> %a, <2 x i64> %b)
979 ; CHECK: rsubhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
[all …]
/external/capstone/suite/MC/AArch64/
Dneon-3vdiff.s.cs138 0x20,0x60,0x22,0x2e = rsubhn v0.8b, v1.8h, v2.8h
139 0x20,0x60,0x62,0x2e = rsubhn v0.4h, v1.4s, v2.4s
140 0x20,0x60,0xa2,0x2e = rsubhn v0.2s, v1.2d, v2.2d
/external/llvm-project/llvm/test/MC/AArch64/
Dneon-3vdiff.s401 rsubhn v0.8b, v1.8h, v2.8h
402 rsubhn v0.4h, v1.4s, v2.4s
403 rsubhn v0.2s, v1.2d, v2.2d
Dneon-diagnostics.s2759 rsubhn v0.8b, v1.8h, v2.8b
2760 rsubhn v0.4h, v1.4s, v2.4h
2761 rsubhn v0.2s, v1.2d, v2.2s
/external/llvm/test/MC/AArch64/
Dneon-3vdiff.s401 rsubhn v0.8b, v1.8h, v2.8h
402 rsubhn v0.4h, v1.4s, v2.4s
403 rsubhn v0.2s, v1.2d, v2.2d
Dneon-diagnostics.s2819 rsubhn v0.8b, v1.8h, v2.8b
2820 rsubhn v0.4h, v1.4s, v2.4h
2821 rsubhn v0.2s, v1.2d, v2.2s
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1458 # CHECK: rsubhn v0.8b, v1.8h, v2.8h
1459 # CHECK: rsubhn v0.4h, v1.4s, v2.4s
1460 # CHECK: rsubhn v0.2s, v1.2d, v2.2d
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1458 # CHECK: rsubhn v0.8b, v1.8h, v2.8h
1459 # CHECK: rsubhn v0.4h, v1.4s, v2.4s
1460 # CHECK: rsubhn v0.2s, v1.2d, v2.2d
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1346 __ rsubhn(v15.V2S(), v25.V2D(), v4.V2D()); in GenerateTestSequenceNEON() local
1347 __ rsubhn(v23.V4H(), v9.V4S(), v3.V4S()); in GenerateTestSequenceNEON() local
1348 __ rsubhn(v6.V8B(), v30.V8H(), v24.V8H()); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc1565 TEST_NEON(rsubhn_0, rsubhn(v0.V8B(), v1.V8H(), v2.V8H()))
1566 TEST_NEON(rsubhn_1, rsubhn(v0.V4H(), v1.V4S(), v2.V4S()))
1567 TEST_NEON(rsubhn_2, rsubhn(v0.V2S(), v1.V2D(), v2.V2D()))
Dtest-simulator-aarch64.cc4702 DEFINE_TEST_NEON_3DIFF_NARROW(rsubhn, Basic)
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour1110 0x~~~~~~~~~~~~~~~~ 2ea4632f rsubhn v15.2s, v25.2d, v4.2d
1111 0x~~~~~~~~~~~~~~~~ 2e636137 rsubhn v23.4h, v9.4s, v3.4s
1112 0x~~~~~~~~~~~~~~~~ 2e3863c6 rsubhn v6.8b, v30.8h, v24.8h
Dlog-disasm1110 0x~~~~~~~~~~~~~~~~ 2ea4632f rsubhn v15.2s, v25.2d, v4.2d
1111 0x~~~~~~~~~~~~~~~~ 2e636137 rsubhn v23.4h, v9.4s, v3.4s
1112 0x~~~~~~~~~~~~~~~~ 2e3863c6 rsubhn v6.8b, v30.8h, v24.8h
Dlog-cpufeatures-custom1109 0x~~~~~~~~~~~~~~~~ 2ea4632f rsubhn v15.2s, v25.2d, v4.2d ### {NEON} ###
1110 0x~~~~~~~~~~~~~~~~ 2e636137 rsubhn v23.4h, v9.4s, v3.4s ### {NEON} ###
1111 0x~~~~~~~~~~~~~~~~ 2e3863c6 rsubhn v6.8b, v30.8h, v24.8h ### {NEON} ###
Dlog-cpufeatures-colour1109 0x~~~~~~~~~~~~~~~~ 2ea4632f rsubhn v15.2s, v25.2d, v4.2d NEON
1110 0x~~~~~~~~~~~~~~~~ 2e636137 rsubhn v23.4h, v9.4s, v3.4s NEON
1111 0x~~~~~~~~~~~~~~~~ 2e3863c6 rsubhn v6.8b, v30.8h, v24.8h NEON
Dlog-cpufeatures1109 0x~~~~~~~~~~~~~~~~ 2ea4632f rsubhn v15.2s, v25.2d, v4.2d // Needs: NEON
1110 0x~~~~~~~~~~~~~~~~ 2e636137 rsubhn v23.4h, v9.4s, v3.4s // Needs: NEON
1111 0x~~~~~~~~~~~~~~~~ 2e3863c6 rsubhn v6.8b, v30.8h, v24.8h // Needs: NEON
Dlog-all5200 0x~~~~~~~~~~~~~~~~ 2ea4632f rsubhn v15.2s, v25.2d, v4.2d
5202 0x~~~~~~~~~~~~~~~~ 2e636137 rsubhn v23.4h, v9.4s, v3.4s
5204 0x~~~~~~~~~~~~~~~~ 2e3863c6 rsubhn v6.8b, v30.8h, v24.8h
/external/capstone/arch/AArch64/
DAArch64MappingInsnOp.inc4657 { /* AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN: rsubhn.2s $rd, $rn, $rm */
4665 { /* AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN: rsubhn.4h $rd, $rn, $rm */
4677 { /* AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN: rsubhn.8b $rd, $rn, $rm */
/external/vixl/src/aarch64/
Dsimulator-aarch64.h3914 V(rsubhn) \
Dassembler-aarch64.h3430 void rsubhn(const VRegister& vd, const VRegister& vn, const VRegister& vm);

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