s_add_u32 (reference) in projects: external

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Searched refs:s_add_u32 (Results 1 – 25 of 178) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AMDGPU/
D	cc-update.ll	`25 ; GFX803-NEXT: s_add_u32 s4, s4, s7 27 ; GFX803-NEXT: s_add_u32 s0, s0, s7 36 ; GFX900-NEXT: s_add_u32 flat_scratch_lo, s4, s7 38 ; GFX900-NEXT: s_add_u32 s0, s0, s7 46 ; GFX1010-NEXT: s_add_u32 s4, s4, s7 51 ; GFX1010-NEXT: s_add_u32 s0, s0, s7 64 ; GFX803-NEXT: s_add_u32 s4, s4, s7 66 ; GFX803-NEXT: s_add_u32 s0, s0, s7 70 ; GFX803-NEXT: s_add_u32 s4, s4, ex@rel32@lo+4 78 ; GFX900-NEXT: s_add_u32 flat_scratch_lo, s4, s7 [all …]`
D	call-waitcnt.ll	`9 ; GCN-NEXT: s_add_u32 flat_scratch_lo, s6, s9 11 ; GCN-NEXT: s_add_u32 s0, s0, s9 17 ; GCN-NEXT: s_add_u32 s4, s4, func@rel32@lo+4 32 ; GCN-NEXT: s_add_u32 flat_scratch_lo, s6, s9 34 ; GCN-NEXT: s_add_u32 s0, s0, s9 41 ; GCN-NEXT: s_add_u32 s6, s6, func@rel32@lo+4 55 ; GCN-NEXT: s_add_u32 flat_scratch_lo, s6, s9 58 ; GCN-NEXT: s_add_u32 s0, s0, s9 62 ; GCN-NEXT: s_add_u32 s4, s4, func@rel32@lo+4 77 ; GCN-NEXT: s_add_u32 flat_scratch_lo, s6, s9 [all …]`
D	global-variable-relocs.ll	17 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], private@rel32@lo+8 31 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], internal@rel32@lo+8 45 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], available_externally@gotpcrel32@lo+4 48 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 62 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], linkonce@gotpcrel32@lo+4 65 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 79 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], weak@gotpcrel32@lo+4 82 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 96 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], common@gotpcrel32@lo+4 99 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 [all …]
D	flat-scratch.ll	`10 ; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s3 32 ; GFX10-NEXT: s_add_u32 s0, s0, s3 59 ; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s1 84 ; GFX10-PAL-NEXT: s_add_u32 s2, s2, s1 191 ; GFX9-NEXT: s_add_u32 flat_scratch_lo, s2, s5 198 ; GFX9-NEXT: s_add_u32 s1, 4, s1 200 ; GFX9-NEXT: s_add_u32 s0, 4, s0 206 ; GFX10-NEXT: s_add_u32 s2, s2, s5 216 ; GFX10-NEXT: s_add_u32 s0, 4, s0 217 ; GFX10-NEXT: s_add_u32 s1, 4, s1 [all …]`
D	gfx-callable-argument-types.ll	104 ; GFX9-NEXT: s_add_u32 s32, s32, 0x400 107 ; GFX9-NEXT: s_add_u32 s4, s4, external_void_func_i1@rel32@lo+4 133 ; GFX10-NEXT: s_add_u32 s32, s32, 0x200 135 ; GFX10-NEXT: s_add_u32 s4, s4, external_void_func_i1@rel32@lo+4 166 ; GFX9-NEXT: s_add_u32 s32, s32, 0x400 168 ; GFX9-NEXT: s_add_u32 s4, s4, external_void_func_i1_signext@rel32@lo+4 196 ; GFX10-NEXT: s_add_u32 s32, s32, 0x200 198 ; GFX10-NEXT: s_add_u32 s4, s4, external_void_func_i1_signext@rel32@lo+4 232 ; GFX9-NEXT: s_add_u32 s32, s32, 0x400 234 ; GFX9-NEXT: s_add_u32 s4, s4, external_void_func_i1_zeroext@rel32@lo+4 [all …]
D	local-stack-alloc-block-sp-reference.ll	`23 ; MUBUF-NEXT: s_add_u32 flat_scratch_lo, s6, s9 25 ; MUBUF-NEXT: s_add_u32 s0, s0, s9 59 ; FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s2, s5 67 ; FLATSCR-NEXT: s_add_u32 s3, 0x3000, s2 74 ; FLATSCR-NEXT: s_add_u32 s2, 0x3000, s2 104 ; MUBUF-NEXT: s_add_u32 s4, s32, 0x7ffc0 112 ; MUBUF-NEXT: s_add_u32 s32, s32, 0x180000 142 ; FLATSCR-NEXT: s_add_u32 s0, s32, 0x1fff 147 ; FLATSCR-NEXT: s_add_u32 s32, s32, 0x6000 151 ; FLATSCR-NEXT: s_add_u32 vcc_hi, s33, 0x1000 [all …]`
D	stack-realign-kernel.ll	`9 ; VI-NEXT: s_add_u32 s4, s4, s7 11 ; VI-NEXT: s_add_u32 s0, s0, s7 56 ; GFX9-NEXT: s_add_u32 flat_scratch_lo, s4, s7 58 ; GFX9-NEXT: s_add_u32 s0, s0, s7 108 ; VI-NEXT: s_add_u32 s4, s4, s7 110 ; VI-NEXT: s_add_u32 s0, s0, s7 155 ; GFX9-NEXT: s_add_u32 flat_scratch_lo, s4, s7 157 ; GFX9-NEXT: s_add_u32 s0, s0, s7 207 ; VI-NEXT: s_add_u32 s4, s4, s7 209 ; VI-NEXT: s_add_u32 s0, s0, s7 [all …]`
D	gfx-callable-preserved-registers.ll	19 ; GFX9-NEXT: s_add_u32 s32, s32, 0x400 21 ; GFX9-NEXT: s_add_u32 s34, s34, external_void_func_void@rel32@lo+4 50 ; GFX10-NEXT: s_add_u32 s32, s32, 0x200 54 ; GFX10-NEXT: s_add_u32 s34, s34, external_void_func_void@rel32@lo+4 114 ; GFX9-NEXT: s_add_u32 s32, s32, 0x400 120 ; GFX9-NEXT: s_add_u32 s4, s4, external_void_func_void@rel32@lo+4 149 ; GFX10-NEXT: s_add_u32 s32, s32, 0x200 151 ; GFX10-NEXT: s_add_u32 s4, s4, external_void_func_void@rel32@lo+4 192 ; GFX9-NEXT: s_add_u32 s32, s32, 0x400 198 ; GFX9-NEXT: s_add_u32 s4, s4, external_void_func_void@rel32@lo+4 [all …]
D	mem-builtins.ll	`14 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, memcmp@rel32@lo+4 25 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, memchr@rel32@lo+4 35 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, strcpy@rel32@lo+4 45 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, strcmp@rel32@lo+4 55 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, strlen@rel32@lo+4 65 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, strnlen@rel32@lo+4`
D	cross-block-use-is-not-abi-copy.ll	`36 ; GCN-NEXT: s_add_u32 s32, s32, 0x400 38 ; GCN-NEXT: s_add_u32 s4, s4, func_v2f32@rel32@lo+4 70 ; GCN-NEXT: s_add_u32 s32, s32, 0x400 72 ; GCN-NEXT: s_add_u32 s4, s4, func_v3f32@rel32@lo+4 104 ; GCN-NEXT: s_add_u32 s32, s32, 0x400 106 ; GCN-NEXT: s_add_u32 s4, s4, func_v4f16@rel32@lo+4 138 ; GCN-NEXT: s_add_u32 s32, s32, 0x400 140 ; GCN-NEXT: s_add_u32 s4, s4, func_struct@rel32@lo+4 172 ; GCN-NEXT: s_add_u32 flat_scratch_lo, s6, s9 174 ; GCN-NEXT: s_add_u32 s0, s0, s9 [all …]`
D	memory-legalizer-private-nontemporal.ll	`17 ; GFX6-NEXT: s_add_u32 s8, s8, s3 34 ; GFX7-NEXT: s_add_u32 s8, s8, s7 52 ; GFX10-WGP-NEXT: s_add_u32 s8, s8, s7 69 ; GFX10-CU-NEXT: s_add_u32 s8, s8, s7 88 ; SKIP-CACHE-INV-NEXT: s_add_u32 s8, s8, s3 112 ; GFX6-NEXT: s_add_u32 s8, s8, s3 130 ; GFX7-NEXT: s_add_u32 s8, s8, s7 149 ; GFX10-WGP-NEXT: s_add_u32 s8, s8, s7 166 ; GFX10-CU-NEXT: s_add_u32 s8, s8, s7 186 ; SKIP-CACHE-INV-NEXT: s_add_u32 s8, s8, s3 [all …]`
D	function-call-relocs.ll	`11 ; CHECK: s_add_u32 s[[GOT_ADDR_LO:[0-9]+]], s[[PC_LO]], func@gotpcrel32@lo+4 22 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], protected_func@rel32@lo+4 32 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], hidden_func@rel32@lo+4 44 ; CHECK: s_add_u32 s[[GOT_ADDR_LO:[0-9]+]], s[[PC_LO]], funci@gotpcrel32@lo+4`
D	call-preserved-registers.ll	10 ; GCN-NEXT: s_add_u32 s34, s34, 62 ; MUBUF: s_add_u32 s32, s32, 0x400 63 ; FLATSCR: s_add_u32 s32, s32, 16 100 ; GCN-NEXT: s_add_u32 140 ; MUBUF-NEXT: s_add_u32 s4, s4, external_void_func_void@rel32@lo+4 143 ; FLATSCR-NEXT: s_add_u32 s0, s0, external_void_func_void@rel32@lo+4 167 ; MUBUF-NEXT: s_add_u32 s4, s4, external_void_func_void@rel32@lo+4 170 ; FLATSCR-NEXT: s_add_u32 s0, s0, external_void_func_void@rel32@lo+4 200 ; MUBUF-NEXT: s_add_u32 s4, s4, external_void_func_void@rel32@lo+4 203 ; FLATSCR-NEXT: s_add_u32 s0, s0, external_void_func_void@rel32@lo+4 [all …]
D	callee-frame-setup.ll	`55 ; MUBUF-NEXT: s_add_u32 s32, s32, 0x200 56 ; FLATSCR-NEXT: s_add_u32 s32, s32, 8 94 ; MUBUF-DAG: s_add_u32 s32, s32, 0x400{{$}} 95 ; FLATSCR-DAG: s_add_u32 s32, s32, 16{{$}} 139 ; MUBUF-DAG: s_add_u32 s32, s32, 0x400 140 ; FLATSCR-DAG: s_add_u32 s32, s32, 16 245 ; MUBUF: s_add_u32 s32, s32, 0x300 248 ; FLATSCR: s_add_u32 s32, s32, 12 274 ; MUBUF: s_add_u32 s32, s32, 0x300 276 ; FLATSCR: s_add_u32 s32, s32, 12 [all …]`
D	branch-relax-bundle.ll	`11 ; s_add_u32 23 ; GCN-NEXT: s_add_u32 29 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, func@`
D	call-constexpr.ll	`6 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_noinline@rel32@lo+4 21 ; GCN-NOT: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_alwaysinline@rel32@lo+4 36 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4 52 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4 80 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, use_workitem_id_x@rel32@lo+4 97 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4`
/external/llvm-project/llvm/test/MC/AMDGPU/
D	trap.s	`15 s_add_u32 ttmp0, ttmp0, 4 label 20 s_add_u32 ttmp4, 8, ttmp4 label 25 s_add_u32 ttmp4, ttmp4, 0x00000100 label 30 s_add_u32 ttmp4, ttmp4, 4 label 35 s_add_u32 ttmp4, ttmp8, ttmp4 label 127 s_add_u32 ttmp0, ttmp12, 4 label 131 s_add_u32 ttmp0, ttmp13, 4 label 135 s_add_u32 ttmp0, ttmp14, 4 label 139 s_add_u32 ttmp0, ttmp15, 4 label`
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
D	dynamic-alloca-uniform.ll	`11 ; GFX9-NEXT: s_add_u32 flat_scratch_lo, s6, s9 13 ; GFX9-NEXT: s_add_u32 s0, s0, s9 20 ; GFX9-NEXT: s_add_u32 s4, s32, s4 29 ; GFX10-NEXT: s_add_u32 s6, s6, s9 36 ; GFX10-NEXT: s_add_u32 s0, s0, s9 43 ; GFX10-NEXT: s_add_u32 s4, s32, s4 58 ; GFX9-NEXT: s_add_u32 s32, s32, 0x400 60 ; GFX9-NEXT: s_add_u32 s4, s4, gv@gotpcrel32@lo+4 71 ; GFX9-NEXT: s_add_u32 s4, s32, s4 84 ; GFX10-NEXT: s_add_u32 s32, s32, 0x200 [all …]`
D	non-entry-alloca.ll	`16 ; GCN-NEXT: s_add_u32 flat_scratch_lo, s6, s9 19 ; GCN-NEXT: s_add_u32 s0, s0, s9 40 ; GCN-NEXT: s_add_u32 s5, s32, 0x1000 41 ; GCN-NEXT: s_add_u32 s8, s5, 4 49 ; GCN-NEXT: s_add_u32 s4, s5, s4 96 ; GCN-NEXT: s_add_u32 flat_scratch_lo, s6, s9 99 ; GCN-NEXT: s_add_u32 s0, s0, s9 112 ; GCN-NEXT: s_add_u32 s5, s32, 0x1000 114 ; GCN-NEXT: s_add_u32 s8, s5, 4 122 ; GCN-NEXT: s_add_u32 s4, s5, s4 [all …]`
D	mul.ll	`293 ; GFX7-NEXT: s_add_u32 s7, s7, s8 323 ; GFX8-NEXT: s_add_u32 s7, s7, s8 350 ; GFX9-NEXT: s_add_u32 s7, s7, s8 354 ; GFX9-NEXT: s_add_u32 s7, s7, s9 464 ; GFX7-NEXT: s_add_u32 s9, s9, s10 473 ; GFX7-NEXT: s_add_u32 s9, s9, s10 478 ; GFX7-NEXT: s_add_u32 s9, s9, s11 522 ; GFX8-NEXT: s_add_u32 s9, s9, s10 531 ; GFX8-NEXT: s_add_u32 s9, s9, s10 536 ; GFX8-NEXT: s_add_u32 s9, s9, s11 [all …]`
D	inline-asm.ll	`15 ; CHECK-NEXT: s_add_u32 s4, s4, s5 22 %asm2 = tail call i32 asm "s_add_u32 $0, $1, $2", "=s,s,s"(i32 %asm0, i32 %asm1) nounwind 37 ; CHECK-NEXT: s_add_u32 s4, s5, s4 44 %asm2 = tail call i32 asm "s_add_u32 $0, $1, $2", "=s,s,0"(i32 %asm0, i32 %asm1) nounwind`
D	localizer.ll	`95 ; GFX9-NEXT: s_add_u32 s0, s0, gv2@gotpcrel32@lo+4 98 ; GFX9-NEXT: s_add_u32 s2, s2, gv3@gotpcrel32@lo+4 115 ; GFX9-NEXT: s_add_u32 s0, s0, gv0@gotpcrel32@lo+4 118 ; GFX9-NEXT: s_add_u32 s2, s2, gv1@gotpcrel32@lo+4 164 ; GFX9-NEXT: s_add_u32 s6, s6, static.gv2@rel32@lo+4 169 ; GFX9-NEXT: s_add_u32 s6, s6, static.gv3@rel32@lo+4 179 ; GFX9-NEXT: s_add_u32 s6, s6, static.gv0@rel32@lo+4 184 ; GFX9-NEXT: s_add_u32 s6, s6, static.gv1@rel32@lo+4`
/external/llvm/test/CodeGen/AMDGPU/
D	global-variable-relocs.ll	17 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], private+8 31 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], internal+8 45 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], available_externally@GOTPCREL+4 48 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 62 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], linkonce@GOTPCREL+4 65 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 79 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], weak@GOTPCREL+4 82 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 96 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], common@GOTPCREL+4 99 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4 [all …]
/external/llvm/test/MC/AMDGPU/
D	trap.s	`9 s_add_u32 ttmp0, ttmp0, 4 label 13 s_add_u32 ttmp4, 8, ttmp4 label 17 s_add_u32 ttmp4, ttmp4, 0x00000100 label 21 s_add_u32 ttmp4, ttmp4, 4 label 25 s_add_u32 ttmp4, ttmp8, ttmp4 label`
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
D	trap_gfx9.txt	7 # GFX9: s_add_u32 ttmp0, ttmp0, 4 ; encoding: [0x6c,0x84,0x6c,0x80] 10 # GFX9: s_add_u32 ttmp4, 8, ttmp4 ; encoding: [0x88,0x70,0x70,0x80] 13 # GFX9: s_add_u32 ttmp4, ttmp4, 0x100 ; encoding: [0x70,0xff,0x70,0x80,0x00,0x01,0x00,0x00] 16 # GFX9: s_add_u32 ttmp4, ttmp4, 4 ; encoding: [0x70,0x84,0x70,0x80] 19 # GFX9: s_add_u32 ttmp4, ttmp8, ttmp4 ; encoding: [0x74,0x70,0x70,0x80] 64 # GFX9: s_add_u32 ttmp0, ttmp12, 4 ; encoding: [0x78,0x84,0x6c,0x80] 67 # GFX9: s_add_u32 ttmp0, ttmp13, 4 ; encoding: [0x79,0x84,0x6c,0x80] 70 # GFX9: s_add_u32 ttmp0, ttmp14, 4 ; encoding: [0x7a,0x84,0x6c,0x80] 73 # GFX9: s_add_u32 ttmp0, ttmp15, 4 ; encoding: [0x7b,0x84,0x6c,0x80]

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