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Searched refs:s_getpc_b64 (Results 1 – 25 of 68) sorted by relevance

123

/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dfunction-call-relocs.ll10 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
21 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
31 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
43 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
Dglobal-variable-relocs.ll16 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
30 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
44 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
61 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
78 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
95 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
112 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
129 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
146 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
163 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
[all …]
Dbranch-relax-bundle.ll10 ; s_getpc_b64
22 ; GCN: s_getpc_b64
28 ; GCN: s_getpc_b64
Dcall-constexpr.ll5 ; GCN: s_getpc_b64
20 ; GCN-NOT: s_getpc_b64
35 ; GCN: s_getpc_b64
51 ; GCN: s_getpc_b64
79 ; GCN: s_getpc_b64
96 ; GCN: s_getpc_b64
Dcall-waitcnt.ll16 ; GCN-NEXT: s_getpc_b64 s[4:5]
40 ; GCN-NEXT: s_getpc_b64 s[6:7]
61 ; GCN-NEXT: s_getpc_b64 s[4:5]
83 ; GCN-NEXT: s_getpc_b64 s[4:5]
104 ; GCN-NEXT: s_getpc_b64 s[4:5]
122 ; GCN-NEXT: s_getpc_b64 s[4:5]
139 ; GCN-NEXT: s_getpc_b64 s[4:5]
Dcall-preserved-registers.ll9 ; GCN: s_getpc_b64 s[34:35]
99 ; GCN: s_getpc_b64
139 ; MUBUF: s_getpc_b64 s[4:5]
142 ; FLATSCR: s_getpc_b64 s[0:1]
166 ; MUBUF: s_getpc_b64 s[4:5]
169 ; FLATSCR: s_getpc_b64 s[0:1]
199 ; MUBUF: s_getpc_b64 s[4:5]
202 ; FLATSCR: s_getpc_b64 s[0:1]
253 ; GCN: s_getpc_b64
265 ; GCN: s_getpc_b64
Dglobal-constant.ll12 ; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
17 ; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}}
33 ; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
Dcc-update.ll69 ; GFX803-NEXT: s_getpc_b64 s[4:5]
82 ; GFX900-NEXT: s_getpc_b64 s[4:5]
98 ; GFX1010-NEXT: s_getpc_b64 s[4:5]
117 ; GFX803-NEXT: s_getpc_b64 s[4:5]
132 ; GFX900-NEXT: s_getpc_b64 s[4:5]
150 ; GFX1010-NEXT: s_getpc_b64 s[4:5]
232 ; GFX803-NEXT: s_getpc_b64 s[4:5]
246 ; GFX900-NEXT: s_getpc_b64 s[4:5]
264 ; GFX1010-NEXT: s_getpc_b64 s[4:5]
284 ; GFX803-NEXT: s_getpc_b64 s[4:5]
[all …]
Dgfx-callable-argument-types.ll106 ; GFX9-NEXT: s_getpc_b64 s[4:5]
134 ; GFX10-NEXT: s_getpc_b64 s[4:5]
167 ; GFX9-NEXT: s_getpc_b64 s[4:5]
197 ; GFX10-NEXT: s_getpc_b64 s[4:5]
233 ; GFX9-NEXT: s_getpc_b64 s[4:5]
263 ; GFX10-NEXT: s_getpc_b64 s[4:5]
299 ; GFX9-NEXT: s_getpc_b64 s[4:5]
326 ; GFX10-NEXT: s_getpc_b64 s[4:5]
358 ; GFX9-NEXT: s_getpc_b64 s[4:5]
385 ; GFX10-NEXT: s_getpc_b64 s[4:5]
[all …]
Dgfx-callable-preserved-registers.ll20 ; GFX9-NEXT: s_getpc_b64 s[34:35]
53 ; GFX10-NEXT: s_getpc_b64 s[34:35]
119 ; GFX9-NEXT: s_getpc_b64 s[4:5]
150 ; GFX10-NEXT: s_getpc_b64 s[4:5]
197 ; GFX9-NEXT: s_getpc_b64 s[4:5]
234 ; GFX10-NEXT: s_getpc_b64 s[4:5]
274 ; GFX9-NEXT: s_getpc_b64 s[4:5]
307 ; GFX10-NEXT: s_getpc_b64 s[4:5]
349 ; GFX9-NEXT: s_getpc_b64 s[4:5]
382 ; GFX10-NEXT: s_getpc_b64 s[4:5]
[all …]
Dbranch-relaxation.ll64 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
108 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
196 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
230 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
288 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
322 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}}
380 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
443 ; GCN-NEXT: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
Dcross-block-use-is-not-abi-copy.ll37 ; GCN-NEXT: s_getpc_b64 s[4:5]
71 ; GCN-NEXT: s_getpc_b64 s[4:5]
105 ; GCN-NEXT: s_getpc_b64 s[4:5]
139 ; GCN-NEXT: s_getpc_b64 s[4:5]
183 ; GCN-NEXT: s_getpc_b64 s[4:5]
228 ; GCN-NEXT: s_getpc_b64 s[4:5]
Dbranch-relaxation-gfx10-branch-offset-bug.ll14 ; GFX1010: s_getpc_b64
62 ; GCN: s_getpc_b64
Dllvm.amdgcn.s.getpc.ll7 ; GCN-DAG: s_getpc_b64 s{{\[[0-9]+:[0-9]+\]}}
Drel32.ll6 ; CHECK: s_getpc_b64 s{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{]}}
Dvgpr-tuple-allocation.ll25 ; GFX9-NEXT: s_getpc_b64 s[4:5]
58 ; GFX10-NEXT: s_getpc_b64 s[4:5]
103 ; GFX9-NEXT: s_getpc_b64 s[4:5]
133 ; GFX10-NEXT: s_getpc_b64 s[4:5]
Dcall-argument-types.ll67 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
87 ; GCN: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
110 ; GCN: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
127 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
145 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
163 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
192 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
209 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
226 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
242 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
[all …]
Dcall-encoding.ll11 ; GCN: s_getpc_b64
/external/llvm/test/CodeGen/AMDGPU/
Dglobal-variable-relocs.ll16 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
30 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
44 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
61 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
78 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
95 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
112 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
129 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
146 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
163 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
[all …]
Dglobal-constant.ll8 ; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
11 ; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}}
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dlocalizer.ll94 ; GFX9-NEXT: s_getpc_b64 s[0:1]
97 ; GFX9-NEXT: s_getpc_b64 s[2:3]
114 ; GFX9-NEXT: s_getpc_b64 s[0:1]
117 ; GFX9-NEXT: s_getpc_b64 s[2:3]
163 ; GFX9-NEXT: s_getpc_b64 s[6:7]
168 ; GFX9-NEXT: s_getpc_b64 s[6:7]
178 ; GFX9-NEXT: s_getpc_b64 s[6:7]
183 ; GFX9-NEXT: s_getpc_b64 s[6:7]
Ddynamic-alloca-uniform.ll59 ; GFX9-NEXT: s_getpc_b64 s[4:5]
85 ; GFX10-NEXT: s_getpc_b64 s[4:5]
161 ; GFX9-NEXT: s_getpc_b64 s[4:5]
187 ; GFX10-NEXT: s_getpc_b64 s[4:5]
266 ; GFX9-NEXT: s_getpc_b64 s[4:5]
294 ; GFX10-NEXT: s_getpc_b64 s[4:5]
/external/llvm-project/llvm/test/MC/AMDGPU/
Doffsetbug_once.s3 s_getpc_b64 s[0:1]
Doffsetbug_one_and_one.s3 s_getpc_b64 s[0:1]
Doffsetbug_twice.s3 s_getpc_b64 s[0:1]

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