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Searched refs:s_load_dwordx2 (Results 1 – 25 of 272) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dimm.ll9 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
20 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
37 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
48 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
64 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
75 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
90 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
100 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
114 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9
124 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
[all …]
Dmemory-legalizer-global-singlethread.ll308 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
319 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
331 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
342 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
352 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
369 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
380 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
392 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
403 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
413 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dmemory-legalizer-global-wavefront.ll308 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
319 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
331 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
342 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
352 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
369 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
380 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
392 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
403 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
413 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dmemory-legalizer-global-workgroup.ll314 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
325 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
337 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
348 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
358 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
375 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
386 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
398 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
409 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
419 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dmemory-legalizer-global-system.ll325 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
336 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
348 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
359 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
369 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
386 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
397 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
409 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
420 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
430 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dmemory-legalizer-global-agent.ll325 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
336 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
348 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
359 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
369 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
386 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
397 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
409 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
420 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
430 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dmemory-legalizer-flat-wavefront.ll247 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
258 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
270 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
282 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
299 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
310 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
322 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
334 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
351 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
362 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
[all …]
Dmemory-legalizer-flat-workgroup.ll262 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
273 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
285 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
297 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
314 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
325 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
337 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
349 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
366 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
378 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
[all …]
Dmemory-legalizer-flat-singlethread.ll247 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
258 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
270 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
282 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
299 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
310 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
322 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
334 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
351 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
362 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
[all …]
Dmemory-legalizer-flat-system.ll269 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
280 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
292 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
304 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
321 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
332 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
344 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
356 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
373 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
385 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
[all …]
Dmemory-legalizer-flat-agent.ll269 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
280 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
292 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
304 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
321 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
332 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
344 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
356 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
373 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
385 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
[all …]
Dload-select-ptr.ll7 ; GCN: s_load_dwordx2
8 ; GCN: s_load_dwordx2
9 ; GCN: s_load_dwordx2
33 ; GCN: s_load_dwordx2
34 ; GCN: s_load_dwordx2
35 ; GCN: s_load_dwordx2
36 ; GCN: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x0{{$}}
37 ; GCN: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x0{{$}}
Dfshl.ll14 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
15 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xb
31 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
32 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
48 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
49 ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
84 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
85 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
96 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
97 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
[all …]
Dmemory-legalizer-local-nontemporal.ll12 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
26 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
41 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
54 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
66 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
87 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
102 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
118 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
131 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
143 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dcvt_f32_ubyte.ll387 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
388 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
403 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
404 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
427 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
428 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
445 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
446 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
471 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
472 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dkernel-args.ll213 ; SI: s_load_dwordx2 s{{\[[0-9]:[0-9]\]}}, s[0:1], 0xb
214 ; MESA-VI: s_load_dwordx2 s{{\[[0-9]:[0-9]\]}}, s[0:1], 0x2c
215 ; HSA-GFX9: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[4:5], 0x8
228 ; SI: s_load_dwordx2 s{{\[[0-9]:[0-9]\]}}, s[0:1], 0xb
229 ; MESA-VI: s_load_dwordx2 s{{\[[0-9]:[0-9]\]}}, s[0:1], 0x2c
230 ; HSA-GFX9: s_load_dwordx2 s{{\[[0-9]:[0-9]\]}}, s[4:5], 0x8
263 ; SI: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xb
265 ; VI-HSA: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x8
266 ; VI-MESA: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x2c
311 ; GCN-DAG: s_load_dwordx2 s
[all …]
Dfcopysign.f64.ll9 ; SI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}…
10 ; SI-DAG: s_load_dwordx2 s{{\[}}[[SSIGN_LO:[0-9]+]]:[[SSIGN_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]…
11 ; VI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}…
12 ; VI-DAG: s_load_dwordx2 s{{\[}}[[SSIGN_LO:[0-9]+]]:[[SSIGN_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]…
27 ; SI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}…
28 ; VI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}…
Dschedule-kernel-arg-loads.ll6 ; SI-NEXT: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
9 ; VI-NEXT: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x34
17 ; s_load_dwordx2 has a register offset
20 ; GCN: s_load_dwordx2
21 ; GCN: s_load_dwordx2
22 ; GCN: s_load_dwordx2
Dllvm.amdgcn.ubfe.ll8 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xb
9 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
20 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
21 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
37 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xb
38 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
50 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
51 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
68 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xb
69 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dllvm.amdgcn.ubfe.ll47 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
68 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
88 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
108 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
129 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
148 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
165 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
166 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
187 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
188 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
[all …]
Dllvm.amdgcn.sbfe.ll47 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
67 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
87 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
108 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
109 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
128 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
147 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
164 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
165 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
186 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dimm.ll323 ; SI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
324 ; VI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0x2c
334 ; SI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
335 ; VI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0x2c
345 ; SI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
346 ; VI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0x2c
356 ; SI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
357 ; VI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0x2c
367 ; SI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
368 ; VI: s_load_dwordx2 [[VAL:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0x2c
[all …]
Dschedule-kernel-arg-loads.ll8 ; SI: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x9
9 ; SI-NEXT: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xb
12 ; VI: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x24
13 ; VI: s_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x2c
22 ; s_load_dwordx2 has a register offset
25 ; GCN: s_load_dwordx2
26 ; GCN: s_load_dwordx2
27 ; GCN: s_load_dwordx2
Dand.ll203 ; SI: s_load_dwordx2
217 ; SI: s_load_dwordx2
218 ; SI: s_load_dwordx2
357 ; SI: s_load_dwordx2
371 ; SI: s_load_dwordx2
372 ; SI: s_load_dwordx2
386 ; SI: s_load_dwordx2
387 ; SI: s_load_dwordx2
401 ; SI: s_load_dwordx2
402 ; SI: s_load_dwordx2
[all …]
/external/llvm-project/llvm/test/MC/AMDGPU/
Dsmrd.s74 s_load_dwordx2 s[2:3], s[2:3], 1 label
78 s_load_dwordx2 s[2:3], s[2:3], s4 label
82 s_load_dwordx2 tba, s[2:3], s4 label
86 s_load_dwordx2 tma, s[2:3], s4 label
90 s_load_dwordx2 ttmp[2:3], s[2:3], s4 label

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