/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | sopc-err.s | 3 s_set_gpr_idx_on s0, s1 label 6 s_set_gpr_idx_on s0, 16 label 9 s_set_gpr_idx_on s0, -1 label 12 s_set_gpr_idx_on s0, gpr_idx label 15 s_set_gpr_idx_on s0, gpr_idx( label 18 s_set_gpr_idx_on s0, gpr_idx(X) label 21 s_set_gpr_idx_on s0, gpr_idx(SRC0,DST,SRC1,DST) label 24 s_set_gpr_idx_on s0, gpr_idx(DST label 27 s_set_gpr_idx_on s0, gpr_idx(SRC0, label
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D | sopc.s | 77 s_set_gpr_idx_on s0, gpr_idx label 83 s_set_gpr_idx_on s0, gpr_idx_mode + 5 label 88 s_set_gpr_idx_on s0, 0 label 93 s_set_gpr_idx_on s0, gpr_idx() label 98 s_set_gpr_idx_on s0, 1 label 103 s_set_gpr_idx_on s0, gpr_idx(SRC0) label 108 s_set_gpr_idx_on s0, 3 label 113 s_set_gpr_idx_on s0, gpr_idx(SRC1,SRC0) label 118 s_set_gpr_idx_on s0, 15 label 123 s_set_gpr_idx_on s0, gpr_idx(SRC0,DST,SRC2,SRC1) label
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D | gfx9_err_pos.s | 22 s_set_gpr_idx_on s0, gpr_idx(SRC0,DST,SRC1,DST) label 51 s_set_gpr_idx_on s0, gpr_idx(SRC0, label 59 s_set_gpr_idx_on s0, gpr_idx( label 64 s_set_gpr_idx_on s0, gpr_idx(X) label 72 s_set_gpr_idx_on s0, gpr_idx(DST label 80 s_set_gpr_idx_on s0, gpr_idx label 85 s_set_gpr_idx_on s0, s1 label 114 s_set_gpr_idx_on s0, 16 label
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D | expressions.s | 140 s_set_gpr_idx_on s0, i1+1 label
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D | gfx10_unsupported.s | 53 s_set_gpr_idx_on -1, 0x0 label
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D | gfx7_unsupported.s | 622 s_set_gpr_idx_on -1, 0x0 label
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D | gfx8_asm_all.s | 23101 s_set_gpr_idx_on s1, 0x0 label 23104 s_set_gpr_idx_on s101, 0x0 label 23107 s_set_gpr_idx_on flat_scratch_lo, 0x0 label 23110 s_set_gpr_idx_on flat_scratch_hi, 0x0 label 23113 s_set_gpr_idx_on vcc_lo, 0x0 label 23116 s_set_gpr_idx_on vcc_hi, 0x0 label 23119 s_set_gpr_idx_on tba_lo, 0x0 label 23122 s_set_gpr_idx_on tba_hi, 0x0 label 23125 s_set_gpr_idx_on tma_lo, 0x0 label 23128 s_set_gpr_idx_on tma_hi, 0x0 label [all …]
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D | gfx9_asm_all.s | 20564 s_set_gpr_idx_on s1, 0x0 label 20567 s_set_gpr_idx_on s101, 0x0 label 20570 s_set_gpr_idx_on flat_scratch_lo, 0x0 label 20573 s_set_gpr_idx_on flat_scratch_hi, 0x0 label 20576 s_set_gpr_idx_on vcc_lo, 0x0 label 20579 s_set_gpr_idx_on vcc_hi, 0x0 label 20582 s_set_gpr_idx_on m0, 0x0 label 20585 s_set_gpr_idx_on 0, 0x0 label 20588 s_set_gpr_idx_on -1, 0x0 label 20591 s_set_gpr_idx_on 0.5, 0x0 label [all …]
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | sopc_vi.txt | 57 # GCN: s_set_gpr_idx_on s0, gpr_idx(SRC0) ; encoding: [0x00,0x01,0x11,0xbf] 60 # GCN: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf] 63 # GCN: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf] 66 # GCN: s_set_gpr_idx_on s0, 0xff ; encoding: [0x00,0xff,0x11,0xbf]
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D | gfx8_dasm_all.txt | 22470 # CHECK: s_set_gpr_idx_on s1, gpr_idx() ; encoding: [0x01,0x00,0x11,0xbf] 22473 # CHECK: s_set_gpr_idx_on s101, gpr_idx() ; encoding: [0x65,0x00,0x11,0xbf] 22476 # CHECK: s_set_gpr_idx_on flat_scratch_lo, gpr_idx() ; encoding: [0x66,0x00,0x11,0xbf] 22479 # CHECK: s_set_gpr_idx_on flat_scratch_hi, gpr_idx() ; encoding: [0x67,0x00,0x11,0xbf] 22482 # CHECK: s_set_gpr_idx_on vcc_lo, gpr_idx() ; encoding: [0x6a,0x00,0x11,0xbf] 22485 # CHECK: s_set_gpr_idx_on vcc_hi, gpr_idx() ; encoding: [0x6b,0x00,0x11,0xbf] 22488 # CHECK: s_set_gpr_idx_on tba_lo, gpr_idx() ; encoding: [0x6c,0x00,0x11,0xbf] 22491 # CHECK: s_set_gpr_idx_on tba_hi, gpr_idx() ; encoding: [0x6d,0x00,0x11,0xbf] 22494 # CHECK: s_set_gpr_idx_on tma_lo, gpr_idx() ; encoding: [0x6e,0x00,0x11,0xbf] 22497 # CHECK: s_set_gpr_idx_on tma_hi, gpr_idx() ; encoding: [0x6f,0x00,0x11,0xbf] [all …]
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D | gfx9_dasm_all.txt | 19674 # CHECK: s_set_gpr_idx_on s1, gpr_idx() ; encoding: [0x01,0x00,0x11,0xbf] 19677 # CHECK: s_set_gpr_idx_on s101, gpr_idx() ; encoding: [0x65,0x00,0x11,0xbf] 19680 # CHECK: s_set_gpr_idx_on flat_scratch_lo, gpr_idx() ; encoding: [0x66,0x00,0x11,0xbf] 19683 # CHECK: s_set_gpr_idx_on flat_scratch_hi, gpr_idx() ; encoding: [0x67,0x00,0x11,0xbf] 19686 # CHECK: s_set_gpr_idx_on vcc_lo, gpr_idx() ; encoding: [0x6a,0x00,0x11,0xbf] 19689 # CHECK: s_set_gpr_idx_on vcc_hi, gpr_idx() ; encoding: [0x6b,0x00,0x11,0xbf] 19692 # CHECK: s_set_gpr_idx_on m0, gpr_idx() ; encoding: [0x7c,0x00,0x11,0xbf] 19695 # CHECK: s_set_gpr_idx_on 0, gpr_idx() ; encoding: [0x80,0x00,0x11,0xbf] 19698 # CHECK: s_set_gpr_idx_on -1, gpr_idx() ; encoding: [0xc1,0x00,0x11,0xbf] 19701 # CHECK: s_set_gpr_idx_on 0.5, gpr_idx() ; encoding: [0xf0,0x00,0x11,0xbf] [all …]
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | indirect-addressing-si.ll | 20 ; IDXMODE: s_set_gpr_idx_on [[IN]], gpr_idx(SRC0){{$}} 46 ; IDXMODE: s_set_gpr_idx_on s{{[0-9]+}}, gpr_idx(SRC0){{$}} 68 ; IDXMODE: s_set_gpr_idx_on [[IN]], gpr_idx(SRC0){{$}} 86 ; IDXMODE-NEXT: s_set_gpr_idx_on [[ADD_IDX]], gpr_idx(SRC0){{$}} 119 ; IDXMODE-NEXT: s_set_gpr_idx_on [[ADD_IDX]], gpr_idx(SRC0){{$}} 197 ; IDXMODE: s_set_gpr_idx_on [[BASE]], gpr_idx(DST) 220 ; IDXMODE: s_set_gpr_idx_on [[BASE_PLUS_OFFSET]], gpr_idx(DST) 239 ; IDXMODE: s_set_gpr_idx_on [[IN]], gpr_idx(DST) 257 ; IDXMODE: s_set_gpr_idx_on [[ADD_IDX]], gpr_idx(DST) 277 ; IDXMODE: s_set_gpr_idx_on [[ADD_IDX]], gpr_idx(DST) [all …]
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D | indirect-addressing-si-gfx9.ll | 48 ; GCN: s_set_gpr_idx_on 52 ; GCN: s_set_gpr_idx_on
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D | movreld-bug.ll | 10 ; GPRIDX: s_set_gpr_idx_on s0, gpr_idx(DST)
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D | expand-si-indirect.mir | 10 # GCN: s_set_gpr_idx_on 14 # GCN: s_set_gpr_idx_on
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | extractelement.ll | 408 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0) 1024 ; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0) 1042 ; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0) 1061 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0) 1451 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0) 1580 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(SRC0) 1996 ; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0)
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D | insertelement.ll | 1076 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(DST) 1145 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(DST) 1402 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(DST) 1715 ; GPRIDX-NEXT: s_set_gpr_idx_on s2, gpr_idx(DST) 2615 ; GPRIDX-NEXT: s_set_gpr_idx_on s18, gpr_idx(DST) 2730 ; GPRIDX-NEXT: s_set_gpr_idx_on s18, gpr_idx(DST) 2846 ; GPRIDX-NEXT: s_set_gpr_idx_on s34, gpr_idx(DST) 2994 ; GPRIDX-NEXT: s_set_gpr_idx_on s33, gpr_idx(DST) 3207 ; GPRIDX-NEXT: s_set_gpr_idx_on s33, gpr_idx(DST) 3744 ; GPRIDX-NEXT: s_set_gpr_idx_on s0, gpr_idx(DST) [all …]
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D | extractelement.i128.ll | 29 ; GFX9-NEXT: s_set_gpr_idx_on s2, gpr_idx(SRC0)
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 926 "s_set_gpr_idx_on $src0,$src1"> {
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 1036 "s_set_gpr_idx_on" ,
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX8.rst | 597 …s_set_gpr_idx_on :ref:`ssrc<amdgpu_synid8_ssrc32_0>`, :ref:`imask<amdgpu_synid8_…
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D | AMDGPUAsmGFX9.rst | 769 …s_set_gpr_idx_on :ref:`ssrc<amdgpu_synid9_ssrc32_0>`, :ref:`imask<amdgpu_synid9_…
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