| /external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| D | ashr.ll | 397 ; GFX6-NEXT: s_sext_i32_i16 s0, s0
403 ; GFX8-NEXT: s_sext_i32_i16 s0, s0
404 ; GFX8-NEXT: s_sext_i32_i16 s1, s1
410 ; GFX9-NEXT: s_sext_i32_i16 s0, s0
411 ; GFX9-NEXT: s_sext_i32_i16 s1, s1
421 ; GCN-NEXT: s_sext_i32_i16 s0, s0
432 ; GFX6-NEXT: s_sext_i32_i16 s0, s0
535 ; GFX6-NEXT: s_sext_i32_i16 s0, s0
538 ; GFX6-NEXT: s_sext_i32_i16 s1, s1
550 ; GFX8-NEXT: s_sext_i32_i16 s0, s0
[all …]
|
| D | ssubsat.ll | 84 ; GFX8-NEXT: s_sext_i32_i16 s3, s0
85 ; GFX8-NEXT: s_sext_i32_i16 s4, -1
92 ; GFX8-NEXT: s_sext_i32_i16 s4, s5
93 ; GFX8-NEXT: s_sext_i32_i16 s1, s1
96 ; GFX8-NEXT: s_sext_i32_i16 s1, s1
97 ; GFX8-NEXT: s_sext_i32_i16 s3, s3
101 ; GFX8-NEXT: s_sext_i32_i16 s0, s0
206 ; GFX8-NEXT: s_sext_i32_i16 s3, s0
207 ; GFX8-NEXT: s_sext_i32_i16 s4, -1
214 ; GFX8-NEXT: s_sext_i32_i16 s4, s5
[all …]
|
| D | saddsat.ll | 84 ; GFX8-NEXT: s_sext_i32_i16 s3, s0
85 ; GFX8-NEXT: s_sext_i32_i16 s4, 0
92 ; GFX8-NEXT: s_sext_i32_i16 s3, s3
93 ; GFX8-NEXT: s_sext_i32_i16 s1, s1
96 ; GFX8-NEXT: s_sext_i32_i16 s1, s1
97 ; GFX8-NEXT: s_sext_i32_i16 s3, s5
101 ; GFX8-NEXT: s_sext_i32_i16 s0, s0
206 ; GFX8-NEXT: s_sext_i32_i16 s3, s0
207 ; GFX8-NEXT: s_sext_i32_i16 s4, 0
214 ; GFX8-NEXT: s_sext_i32_i16 s3, s3
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | load-constant-i16.ll | 964 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s5, s2
980 ; GCN-HSA-NEXT: s_sext_i32_i16 s1, s2
997 ; GCN-NOHSA-VI-NEXT: s_sext_i32_i16 s1, s2
1126 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s5, s5
1127 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s4, s4
1145 ; GCN-HSA-NEXT: s_sext_i32_i16 s1, s1
1146 ; GCN-HSA-NEXT: s_sext_i32_i16 s0, s0
1164 ; GCN-NOHSA-VI-NEXT: s_sext_i32_i16 s5, s5
1165 ; GCN-NOHSA-VI-NEXT: s_sext_i32_i16 s4, s4
1314 ; GCN-NOHSA-SI-NEXT: s_sext_i32_i16 s5, s5
[all …]
|
| D | trunc-combine.ll | 96 ; SI-NEXT: s_sext_i32_i16 s4, s4
97 ; SI-NEXT: s_sext_i32_i16 s5, s5
114 ; VI-NEXT: s_sext_i32_i16 s0, s2
115 ; VI-NEXT: s_sext_i32_i16 s1, s3
|
| D | idot2.ll | 297 ; GFX7-NEXT: s_sext_i32_i16 s7, s4
299 ; GFX7-NEXT: s_sext_i32_i16 s8, s5
318 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
320 ; GFX8-NEXT: s_sext_i32_i16 s6, s3
342 ; GFX9-NODL-NEXT: s_sext_i32_i16 s5, s2
344 ; GFX9-NODL-NEXT: s_sext_i32_i16 s6, s3
424 ; GFX7-NEXT: s_sext_i32_i16 s4, s4
428 ; GFX7-NEXT: s_sext_i32_i16 s5, s5
443 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
445 ; GFX8-NEXT: s_sext_i32_i16 s6, s3
[all …]
|
| D | llvm.amdgcn.icmp.ll | 257 ; SI-DAG: s_sext_i32_i16 [[CVT:s[0-9]+]], s{{[0-9]+}}
269 ; SI-DAG: s_sext_i32_i16 [[CVT:s[0-9]+]], s{{[0-9]+}}
281 ; SI-DAG: s_sext_i32_i16 [[CVT:s[0-9]+]], s{{[0-9]+}}
292 ; SI-DAG: s_sext_i32_i16 [[CVT:s[0-9]+]], s{{[0-9]+}}
|
| D | max.ll | 251 ; SI-DAG: s_sext_i32_i16 [[EXT_A:s[0-9]+]], [[A]]
252 ; SI-DAG: s_sext_i32_i16 [[EXT_B:s[0-9]+]], [[B]]
273 ; SI: s_sext_i32_i16
274 ; SI: s_sext_i32_i16
|
| D | sext-in-reg.ll | 45 ; GCN: s_sext_i32_i16 [[EXTRACT:s[0-9]+]], [[VAL]]
376 ; GCN: s_sext_i32_i16 {{s[0-9]+}}, {{s[0-9]+}}
377 ; GCN: s_sext_i32_i16 {{s[0-9]+}}, {{s[0-9]+}}
529 ; GFX89: s_sext_i32_i16 s{{[0-9]+}}, s{{[0-9]+}}
548 ; GFX89: s_sext_i32_i16 s{{[0-9]+}}, s{{[0-9]+}}
609 ; GFX89: s_sext_i32_i16 s{{[0-9]+}}, s{{[0-9]+}}
626 ; GFX89: s_sext_i32_i16 s{{[0-9]+}}, s{{[0-9]+}}
643 ; GFX89: s_sext_i32_i16 s{{[0-9]+}}, s{{[0-9]+}}
|
| D | min.ll | 115 ; SI: s_sext_i32_i16
116 ; SI: s_sext_i32_i16
120 ; VI: s_sext_i32_i16
121 ; VI: s_sext_i32_i16
518 ; GCN-DAG: s_sext_i32_i16 [[EXT_A:s[0-9]+]], [[A]]
519 ; GCN-DAG: s_sext_i32_i16 [[EXT_B:s[0-9]+]], [[B]]
|
| D | ashr.v2i16.ll | 17 ; CIVI-DAG: s_sext_i32_i16
18 ; CIVI-DAG: s_sext_i32_i16
|
| D | sext-divergence-driven-isel.ll | 12 ; GCN-NEXT: s_sext_i32_i16 s0, s0
|
| D | sint_to_fp.f64.ll | 78 ; VI: s_sext_i32_i16 [[SEXT:s[0-9]+]], [[BFE]]
|
| D | sign_extend.ll | 475 ; SI-NEXT: s_sext_i32_i16 s6, s6
480 ; SI-NEXT: s_sext_i32_i16 s7, s7
498 ; VI-NEXT: s_sext_i32_i16 s6, s6
504 ; VI-NEXT: s_sext_i32_i16 s7, s7
|
| D | idiv-licm.ll | 347 ; GFX9-NEXT: s_sext_i32_i16 s2, s2
402 ; GFX9-NEXT: s_sext_i32_i16 s4, s2
|
| D | widen-smrd-loads.ll | 92 ; SI-NEXT: s_sext_i32_i16 s1, s1
108 ; VI-NEXT: s_sext_i32_i16 s0, s0
|
| /external/llvm/test/MC/AMDGPU/ |
| D | sop1.s | 143 s_sext_i32_i16 s1, s2 label
|
| /external/llvm-project/llvm/test/MC/AMDGPU/ |
| D | sop1.s | 186 s_sext_i32_i16 s1, s2 label
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | load-constant-i16.ll | 141 ; GCN-DAG: s_sext_i32_i16
195 ; GCN-DAG: s_sext_i32_i16
230 ; GCN-DAG: s_sext_i32_i16
252 ; GCN-DAG: s_sext_i32_i16
275 ; GCN-DAG: s_sext_i32_i16
|
| D | sign_extend.ll | 127 ; GCN-DAG: s_sext_i32_i16
128 ; GCN-DAG: s_sext_i32_i16
|
| D | max.ll | 260 ; SI: s_sext_i32_i16
261 ; SI: s_sext_i32_i16
|
| D | smed3.ll | 366 ; GCN: s_sext_i32_i16
367 ; GCN: s_sext_i32_i16
368 ; GCN: s_sext_i32_i16
|
| D | sext-in-reg.ll | 44 ; SI: s_sext_i32_i16 [[EXTRACT:s[0-9]+]], [[VAL]]
353 ; SI: s_sext_i32_i16 {{s[0-9]+}}, {{s[0-9]+}}
354 ; SI: s_sext_i32_i16 {{s[0-9]+}}, {{s[0-9]+}}
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop1_vi.txt | 99 # VI: s_sext_i32_i16 s1, s2 ; encoding: [0x02,0x17,0x81,0xbe]
|
| /external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop1_vi.txt | 108 # VI: s_sext_i32_i16 s1, s2 ; encoding: [0x02,0x17,0x81,0xbe]
|